forked from OSchip/llvm-project
89 lines
3.1 KiB
LLVM
89 lines
3.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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; FIXME: https://llvm.org/bugs/show_bug.cgi?id=26701
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define <16 x i8> @pcmpgtb(<16 x i8> %x) {
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; SSE-LABEL: pcmpgtb:
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; SSE: # BB#0:
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; SSE-NEXT: pxor %xmm1, %xmm1
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; SSE-NEXT: pcmpgtb %xmm0, %xmm1
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; SSE-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: pcmpgtb:
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; AVX: # BB#0:
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; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%sign = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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%not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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ret <16 x i8> %not
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}
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define <8 x i16> @pcmpgtw(<8 x i16> %x) {
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; SSE-LABEL: pcmpgtw:
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; SSE: # BB#0:
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; SSE-NEXT: psraw $15, %xmm0
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; SSE-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE-NEXT: pxor %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: pcmpgtw:
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; AVX: # BB#0:
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; AVX-NEXT: vpsraw $15, %xmm0, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%sign = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
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%not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
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ret <8 x i16> %not
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}
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define <4 x i32> @pcmpgtd(<4 x i32> %x) {
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; SSE-LABEL: pcmpgtd:
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; SSE: # BB#0:
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; SSE-NEXT: psrad $31, %xmm0
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; SSE-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE-NEXT: pxor %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: pcmpgtd:
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; AVX: # BB#0:
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; AVX-NEXT: vpsrad $31, %xmm0, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%sign = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
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%not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %not
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}
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define <2 x i64> @pcmpgtq(<2 x i64> %x) {
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; SSE-LABEL: pcmpgtq:
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; SSE: # BB#0:
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; SSE-NEXT: psrad $31, %xmm0
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; SSE-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE-NEXT: pxor %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: pcmpgtq:
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; AVX: # BB#0:
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; AVX-NEXT: vpsrad $31, %xmm0, %xmm0
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; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%sign = ashr <2 x i64> %x, <i64 63, i64 63>
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%not = xor <2 x i64> %sign, <i64 -1, i64 -1>
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ret <2 x i64> %not
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}
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