llvm-project/llvm/lib/Target/X86/Makefile

##===- lib/Target/X86/Makefile -----------------------------*- Makefile -*-===##
#
#                     The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##

LEVEL = ../../..
LIBRARYNAME = LLVMX86CodeGen
TARGET = X86

# Make sure that tblgen is run, first thing.
BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \
		X86GenAsmWriter.inc X86GenAsmMatcher.inc \
                X86GenAsmWriter1.inc X86GenDAGISel.inc  \
                X86GenDisassemblerTables.inc X86GenFastISel.inc \
                X86GenCallingConv.inc X86GenSubtargetInfo.inc

DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils

include $(LEVEL)/Makefile.common
We know exactly what the value of $< is, so instead of using `basename $<` to get just the filename and not the full path, just use the filename directly. llvm-svn: 9730 2003-11-05 14:43:36 +08:00			`##===- lib/Target/X86/Makefile ------------------------------ Makefile --===##`
Removed trailing whitespace from Makefiles. llvm-svn: 61991 2009-01-10 00:44:42 +08:00			`#`
Added LLVM copyright notice to Makefiles. llvm-svn: 9312 2003-10-21 06:26:57 +08:00			`# The LLVM Compiler Infrastructure`
			`#`
remove attribution from lib Makefiles. llvm-svn: 45415 2007-12-30 04:09:26 +08:00			`# This file is distributed under the University of Illinois Open Source`
			`# License. See LICENSE.TXT for details.`
Removed trailing whitespace from Makefiles. llvm-svn: 61991 2009-01-10 00:44:42 +08:00			`#`
Added LLVM copyright notice to Makefiles. llvm-svn: 9312 2003-10-21 06:26:57 +08:00			`##===----------------------------------------------------------------------===##`
Stop building RTTI information for most llvm libraries. Notable missing ones are libsupport, libsystem and libvmcore. libvmcore is currently blocked on bugpoint, which uses EH. Once it stops using EH, we can switch it off. This #if 0's out 3 unit tests, because gtest requires RTTI information. Suggestions welcome on how to fix this. llvm-svn: 94164 2010-01-22 14:49:46 +08:00
Initial checkin of X86 backend. We can instruction select exactly one instruction 'ret void'. Wow. llvm-svn: 4284 2002-10-26 06:55:53 +08:00			`LEVEL = ../../..`
Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this) llvm-svn: 54886 2008-08-17 21:53:59 +08:00			`LIBRARYNAME = LLVMX86CodeGen`
Factor a bunch of the rules and add support for generating the asmwriter. llvm-svn: 15388 2004-08-01 14:01:32 +08:00			`TARGET = X86`
don't distribute internal readme's llvm-svn: 31245 2006-10-28 08:48:27 +08:00
Switch over to TableGen generated register file description llvm-svn: 7511 2003-08-03 23:48:14 +08:00			`# Make sure that tblgen is run, first thing.`
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc llvm-svn: 134024 2011-06-29 04:07:07 +08:00			`BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \`
Starting to refactor Target to separate out code that's needed to fully describe target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782 2011-06-24 09:44:41 +08:00			`X86GenAsmWriter.inc X86GenAsmMatcher.inc \`
Still need to support -mcpu=<> or cross compilation will fail. Doh. llvm-svn: 30764 2006-10-06 17:17:41 +08:00			`X86GenAsmWriter1.inc X86GenDAGISel.inc \`
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit incarnations), integrated into the MC framework. The disassembler is table-driven, using a custom TableGen backend to generate hierarchical tables optimized for fast decode. The disassembler consumes MemoryObjects and produces arrays of MCInsts, adhering to the abstract base class MCDisassembler (llvm/MC/MCDisassembler.h). The disassembler is documented in detail in - lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime) - utils/TableGen/DisassemblerEmitter.cpp (table emitter) You can test the disassembler by running llvm-mc -disassemble for i386 or x86_64 targets. Please let me know if you encounter any problems with it. llvm-svn: 91749 2009-12-19 10:59:52 +08:00			`X86GenDisassemblerTables.inc X86GenFastISel.inc \`
Remove edis - the enhanced disassembler. Fixes PR14654. llvm-svn: 170578 2012-12-20 03:55:47 +08:00			`X86GenCallingConv.inc X86GenSubtargetInfo.inc`
Switch over to TableGen generated register file description llvm-svn: 7511 2003-08-03 23:48:14 +08:00
Rename TargetDesc to MCTargetDesc llvm-svn: 133846 2011-06-25 07:53:19 +08:00			`DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils`
Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this) llvm-svn: 54886 2008-08-17 21:53:59 +08:00
Adjust to changes in Makefile.rules llvm-svn: 17167 2004-10-23 05:02:08 +08:00			`include $(LEVEL)/Makefile.common`