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llvm-project/llvm/test/CodeGen/X86/mulx32.ll

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Add MULX code generation support llvm-svn: 164673
2012-09-26 16:22:37 +08:00
; RUN: llc -mcpu=core-avx2 -march=x86 < %s | FileCheck %s
define i64 @f1(i32 %a, i32 %b) {
%x = zext i32 %a to i64
%y = zext i32 %b to i64
%r = mul i64 %x, %y
; CHECK: f1
; CHECK: mulxl
; CHECK: ret
ret i64 %r
}
define i64 @f2(i32 %a, i32* %p) {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%b = load i32, i32* %p
Add MULX code generation support llvm-svn: 164673
2012-09-26 16:22:37 +08:00
%x = zext i32 %a to i64
%y = zext i32 %b to i64
%r = mul i64 %x, %y
llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto. llvm-svn: 164681
2012-09-26 17:24:12 +08:00
; CHECK: f2
Add MULX code generation support llvm-svn: 164673
2012-09-26 16:22:37 +08:00
; CHECK: mulxl ({{.+}}), %{{.+}}, %{{.+}}
; CHECK: ret
ret i64 %r
}