2015-08-26 07:27:41 +08:00
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnu | FileCheck %s
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; Verify that the var arg parameters which are passed in registers are stored
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; in home stack slots allocated by the caller and that AP is correctly
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; calculated.
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2017-07-18 04:05:19 +08:00
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define win64cc void @average_va(i32 %count, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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; CHECK: pushq
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; CHECK: movq %r9, 40(%rsp)
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; CHECK: movq %r8, 32(%rsp)
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; CHECK: movq %rdx, 24(%rsp)
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; CHECK: leaq 24(%rsp), %rax
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%ap = alloca i8*, align 8 ; <i8**> [#uses=1]
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%ap.0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap.0)
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ret void
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}
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_copy(i8*, i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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; CHECK-LABEL: f5:
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; CHECK: pushq
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; CHECK: leaq 56(%rsp),
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2017-07-18 04:05:19 +08:00
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define win64cc i8** @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap.0)
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ret i8** %ap
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}
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; CHECK-LABEL: f4:
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; CHECK: pushq
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; CHECK: leaq 48(%rsp),
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2017-07-18 04:05:19 +08:00
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define win64cc i8** @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap.0)
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ret i8** %ap
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}
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; CHECK-LABEL: f3:
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; CHECK: pushq
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; CHECK: leaq 40(%rsp),
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2017-07-18 04:05:19 +08:00
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define win64cc i8** @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap.0)
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ret i8** %ap
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}
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; WinX86_64 uses char* for va_list. Verify that the correct amount of bytes
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; are copied using va_copy.
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; CHECK-LABEL: copy1:
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; CHECK: leaq 32(%rsp), [[REG_copy1:%[a-z]+]]
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; CHECK: movq [[REG_copy1]], 8(%rsp)
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; CHECK: movq [[REG_copy1]], (%rsp)
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; CHECK: ret
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2017-07-18 04:05:19 +08:00
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define win64cc void @copy1(i64 %a0, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%cp = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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%cp.0 = bitcast i8** %cp to i8*
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call void @llvm.va_start(i8* %ap.0)
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call void @llvm.va_copy(i8* %cp.0, i8* %ap.0)
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ret void
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}
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; CHECK-LABEL: copy4:
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; CHECK: leaq 56(%rsp), [[REG_copy4:%[a-z]+]]
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; CHECK: movq [[REG_copy4]], 8(%rsp)
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; CHECK: movq [[REG_copy4]], (%rsp)
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; CHECK: ret
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2017-07-18 04:05:19 +08:00
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define win64cc void @copy4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%cp = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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%cp.0 = bitcast i8** %cp to i8*
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call void @llvm.va_start(i8* %ap.0)
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call void @llvm.va_copy(i8* %cp.0, i8* %ap.0)
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ret void
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}
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; CHECK-LABEL: arg4:
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Elide stores which are overwritten without being observed.
Summary:
In SelectionDAG, when a store is immediately chained to another store
to the same address, elide the first store as it has no observable
effects. This is causes small improvements dealing with intrinsics
lowered to stores.
Test notes:
* Many testcases overwrite store addresses multiple times and needed
minor changes, mainly making stores volatile to prevent the
optimization from optimizing the test away.
* Many X86 test cases optimized out instructions associated with
associated with va_start.
* Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has
dependencies to check and can probably be removed and potentially
replaced with another test.
Reviewers: rnk, john.brawn
Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33206
llvm-svn: 303198
2017-05-17 03:43:56 +08:00
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; va_start (optimized away as overwritten by va_arg)
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2015-08-26 07:27:41 +08:00
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; va_arg:
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; CHECK: leaq 52(%rsp), [[REG_arg4_2:%[a-z]+]]
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; CHECK: movq [[REG_arg4_2]], (%rsp)
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; CHECK: movl 48(%rsp), %eax
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; CHECK: ret
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2017-07-18 04:05:19 +08:00
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define win64cc i32 @arg4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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2015-08-26 07:27:41 +08:00
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entry:
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%ap = alloca i8*, align 8
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%ap.0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap.0)
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%tmp = va_arg i8** %ap, i32
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ret i32 %tmp
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}
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