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llvm-project/llvm/test/CodeGen/X86/sdiv-exact.ll

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[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
Emit a more efficient magic number multiplication for exact sdivs. We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building. struct foo { char x[24]; }; long bar(struct foo *a, struct foo *b) { return a-b; } is now compiled into movl 4(%esp), %eax subl 8(%esp), %eax sarl $3, %eax imull $-1431655765, %eax, %eax instead of movl 4(%esp), %eax subl 8(%esp), %eax movl $715827883, %ecx imull %ecx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx movl %edx, %eax llvm-svn: 134695
2011-07-08 18:31:30 +08:00
define i32 @test1(i32 %x) {
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; X86-LABEL: test1:
; X86: # %bb.0:
; X86-NEXT: imull $-1030792151, {{[0-9]+}}(%esp), %eax # imm = 0xC28F5C29
; X86-NEXT: retl
;
; X64-LABEL: test1:
; X64: # %bb.0:
; X64-NEXT: imull $-1030792151, %edi, %eax # imm = 0xC28F5C29
; X64-NEXT: retq
Emit a more efficient magic number multiplication for exact sdivs. We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building. struct foo { char x[24]; }; long bar(struct foo *a, struct foo *b) { return a-b; } is now compiled into movl 4(%esp), %eax subl 8(%esp), %eax sarl $3, %eax imull $-1431655765, %eax, %eax instead of movl 4(%esp), %eax subl 8(%esp), %eax movl $715827883, %ecx imull %ecx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx movl %edx, %eax llvm-svn: 134695
2011-07-08 18:31:30 +08:00
%div = sdiv exact i32 %x, 25
ret i32 %div
}
define i32 @test2(i32 %x) {
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; X86-LABEL: test2:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: sarl $3, %eax
; X86-NEXT: imull $-1431655765, %eax, %eax # imm = 0xAAAAAAAB
; X86-NEXT: retl
;
; X64-LABEL: test2:
; X64: # %bb.0:
; X64-NEXT: sarl $3, %edi
; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
; X64-NEXT: retq
Emit a more efficient magic number multiplication for exact sdivs. We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building. struct foo { char x[24]; }; long bar(struct foo *a, struct foo *b) { return a-b; } is now compiled into movl 4(%esp), %eax subl 8(%esp), %eax sarl $3, %eax imull $-1431655765, %eax, %eax instead of movl 4(%esp), %eax subl 8(%esp), %eax movl $715827883, %ecx imull %ecx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx movl %edx, %eax llvm-svn: 134695
2011-07-08 18:31:30 +08:00
%div = sdiv exact i32 %x, 24
ret i32 %div
}
[SDAG] Now that we have a way to communicate the exact bit on sdiv use it to simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
2015-06-28 04:33:26 +08:00
define <4 x i32> @test3(<4 x i32> %x) {
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; X86-LABEL: test3:
; X86: # %bb.0:
; X86-NEXT: psrad $3, %xmm0
; X86-NEXT: movdqa {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; X86-NEXT: pmuludq %xmm1, %xmm0
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X86-NEXT: pmuludq %xmm1, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; X86-NEXT: retl
;
; X64-LABEL: test3:
; X64: # %bb.0:
; X64-NEXT: vpsrad $3, %xmm0, %xmm0
; X64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
[SDAG] Now that we have a way to communicate the exact bit on sdiv use it to simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
2015-06-28 04:33:26 +08:00
%div = sdiv exact <4 x i32> %x, <i32 24, i32 24, i32 24, i32 24>
ret <4 x i32> %div
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
}
define <4 x i32> @test4(<4 x i32> %x) {
; X86-LABEL: test4:
; X86: # %bb.0:
; X86-NEXT: movdqa {{.*#+}} xmm1 = [3264175145,3264175145,3264175145,3264175145]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; X86-NEXT: pmuludq %xmm1, %xmm0
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X86-NEXT: pmuludq %xmm1, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; X86-NEXT: retl
;
; X64-LABEL: test4:
; X64: # %bb.0:
; X64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3264175145,3264175145,3264175145,3264175145]
; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%div = sdiv exact <4 x i32> %x, <i32 25, i32 25, i32 25, i32 25>
ret <4 x i32> %div
}
define <4 x i32> @test5(<4 x i32> %x) {
; X86-LABEL: test5:
; X86: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X86-NEXT: movdqa %xmm0, %xmm1
; X86-NEXT: psrad $3, %xmm1
; X86-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X86-NEXT: movdqa {{.*#+}} xmm2 = [2863311531,2863311531,3264175145,3264175145]
; X86-NEXT: movapd %xmm0, %xmm1
; X86-NEXT: pmuludq %xmm2, %xmm1
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; X86-NEXT: pmuludq %xmm0, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; X86-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; X86-NEXT: movdqa %xmm1, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: test5:
; X64: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X64-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
[X86][SSE] Add uniform/non-uniform exact sdiv vector tests covering all paths Regenerated tests and tested on 64-bit (AVX2) as well. llvm-svn: 338729
2018-08-02 23:34:51 +08:00
; X64-NEXT: retq
%div = sdiv exact <4 x i32> %x, <i32 24, i32 24, i32 25, i32 25>
ret <4 x i32> %div
[SDAG] Now that we have a way to communicate the exact bit on sdiv use it to simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
2015-06-28 04:33:26 +08:00
}
[X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths llvm-svn: 339120
2018-08-07 17:31:22 +08:00
define <4 x i32> @test6(<4 x i32> %x) {
; X86-LABEL: test6:
; X86: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X86-NEXT: movdqa %xmm0, %xmm1
; X86-NEXT: psrad $3, %xmm1
; X86-NEXT: psrad $1, %xmm0
; X86-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X86-NEXT: movdqa {{.*#+}} xmm2 = [2863311531,2863311531,3303820997,3303820997]
; X86-NEXT: movapd %xmm0, %xmm1
; X86-NEXT: pmuludq %xmm2, %xmm1
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; X86-NEXT: pmuludq %xmm0, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
[X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths llvm-svn: 339120
2018-08-07 17:31:22 +08:00
; X86-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; X86-NEXT: movdqa %xmm1, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: test6:
; X64: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X64-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
[X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths llvm-svn: 339120
2018-08-07 17:31:22 +08:00
; X64-NEXT: retq
%div = sdiv exact <4 x i32> %x, <i32 24, i32 24, i32 26, i32 26>
ret <4 x i32> %div
}
define <4 x i32> @test7(<4 x i32> %x) {
; X86-LABEL: test7:
; X86: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X86-NEXT: movdqa {{.*#+}} xmm1 = [3264175145,3264175145,1749801491,1749801491]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; X86-NEXT: pmuludq %xmm1, %xmm0
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; X86-NEXT: pmuludq %xmm2, %xmm1
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
[X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths llvm-svn: 339120
2018-08-07 17:31:22 +08:00
; X86-NEXT: retl
;
; X64-LABEL: test7:
; X64: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X64-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
[X86][SSE] Add more non-uniform exact sdiv vector tests covering all/none ashr paths llvm-svn: 339120
2018-08-07 17:31:22 +08:00
; X64-NEXT: retq
%div = sdiv exact <4 x i32> %x, <i32 25, i32 25, i32 27, i32 27>
ret <4 x i32> %div
}
[X86][SSE] Add divide-by-one exact sdiv vector test Based on PR38477, we need to ensure we're testing for divide-by-one in non-uniform vectors llvm-svn: 339231
2018-08-08 18:16:43 +08:00
define <4 x i32> @test8(<4 x i32> %x) {
; X86-LABEL: test8:
; X86: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X86-NEXT: movdqa %xmm0, %xmm1
; X86-NEXT: psrad $3, %xmm1
; X86-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; X86-NEXT: movdqa {{.*#+}} xmm2 = [1,1,2863311531,2863311531]
; X86-NEXT: movapd %xmm1, %xmm0
; X86-NEXT: pmuludq %xmm2, %xmm0
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,3,3]
; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; X86-NEXT: pmuludq %xmm1, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
[X86][SSE] Add divide-by-one exact sdiv vector test Based on PR38477, we need to ensure we're testing for divide-by-one in non-uniform vectors llvm-svn: 339231
2018-08-08 18:16:43 +08:00
; X86-NEXT: retl
;
; X64-LABEL: test8:
; X64: # %bb.0:
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators. Differential Revision: https://reviews.llvm.org/D50392 llvm-svn: 339756
2018-08-15 17:35:12 +08:00
; X64-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
[X86][SSE] Add divide-by-one exact sdiv vector test Based on PR38477, we need to ensure we're testing for divide-by-one in non-uniform vectors llvm-svn: 339231
2018-08-08 18:16:43 +08:00
; X64-NEXT: retq
%div = sdiv exact <4 x i32> %x, <i32 1, i32 1, i32 24, i32 24>
ret <4 x i32> %div
}