2018-11-10 07:33:30 +08:00
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; RUN: llc -o - %s -mtriple=aarch64-windows -verify-machineinstrs | FileCheck %s
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; Check we don't have a base pointer.
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; CHECK-LABEL: "?a@@YAXXZ":
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; CHECK-NOT: x19
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; Make sure the prologue and epilogue are sane. Make sure the
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; frame index is relative to the FP, since there is no base pointer.
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; (Funclets aren't allowed to contain dynamic allocas.)
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; CHECK-LABEL: "?catch$2@?0??a@@YAXXZ@4HA":
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; CHECK: stp x29, x30, [sp, #-16]!
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[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating
code directly to an object file or if generating assembly and
assembling that.
Add implementations of the EmitARM64WinCFI*() methods in
AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and
COFFAsmParser.
Some SEH directive names have been picked to match the prior art
for SEH assembly directives for x86_64, e.g. the spelling of
".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling
from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow
that naming for all the other ones, e.g. ".seh_save_fregp_x"), while
the corresponding one for x86_64 is plain ".seh_savereg" without the
second underscore.
Directives in the epilogues have the same names as in prologues,
e.g. .seh_savereg, even though the registers are restored, not
saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
2020-08-07 17:44:48 +08:00
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; CHECK-NEXT: .seh_save_fplr_x 16
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; CHECK-NEXT: .seh_endprologue
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2018-11-10 07:33:30 +08:00
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; CHECK-NEXT: ldur x0, [x29, #-8]
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; CHECK-NEXT: mov x1, x0
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; CHECK-NEXT: bl "?bb@@YAXPEAHH@Z"
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; CHECK-NEXT: adrp x0, .LBB0_1
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; CHECK-NEXT: add x0, x0, .LBB0_1
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[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating
code directly to an object file or if generating assembly and
assembling that.
Add implementations of the EmitARM64WinCFI*() methods in
AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and
COFFAsmParser.
Some SEH directive names have been picked to match the prior art
for SEH assembly directives for x86_64, e.g. the spelling of
".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling
from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow
that naming for all the other ones, e.g. ".seh_save_fregp_x"), while
the corresponding one for x86_64 is plain ".seh_savereg" without the
second underscore.
Directives in the epilogues have the same names as in prologues,
e.g. .seh_savereg, even though the registers are restored, not
saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
2020-08-07 17:44:48 +08:00
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; CHECK-NEXT: .seh_startepilogue
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2018-11-10 07:33:30 +08:00
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; CHECK-NEXT: ldp x29, x30, [sp], #16
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[AArch64] Generate and parse SEH assembly directives
This ensures that you get the same output regardless if generating
code directly to an object file or if generating assembly and
assembling that.
Add implementations of the EmitARM64WinCFI*() methods in
AArch64TargetAsmStreamer, and fill in one blank in MCAsmStreamer.
Add corresponding directive handlers in AArch64AsmParser and
COFFAsmParser.
Some SEH directive names have been picked to match the prior art
for SEH assembly directives for x86_64, e.g. the spelling of
".seh_startepilogue" matching the preexisting ".seh_endprologue".
For the directives for saving registers, the exact spelling
from the arm64 documentation is picked, e.g. ".seh_save_reg" (to follow
that naming for all the other ones, e.g. ".seh_save_fregp_x"), while
the corresponding one for x86_64 is plain ".seh_savereg" without the
second underscore.
Directives in the epilogues have the same names as in prologues,
e.g. .seh_savereg, even though the registers are restored, not
saved, at that point.
Differential Revision: https://reviews.llvm.org/D86529
2020-08-07 17:44:48 +08:00
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; CHECK-NEXT: .seh_save_fplr_x 16
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; CHECK-NEXT: .seh_endepilogue
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2018-11-10 07:33:30 +08:00
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; CHECK-NEXT: ret
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target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-windows-msvc19.11.0"
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define dso_local void @"?a@@YAXXZ"(i64 %p1) personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
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entry:
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%a = alloca i32, i64 %p1, align 16
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%0 = bitcast i32* %a to i8*
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call void @llvm.memset.p0i8.i64(i8* nonnull align 16 %0, i8 0, i64 400, i1 false)
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store i32 305419896, i32* %a, align 16
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invoke void @"?bb@@YAXPEAHH@Z"(i32* nonnull %a, i32* null)
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to label %try.cont unwind label %catch.dispatch
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catch.dispatch: ; preds = %entry
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%1 = catchswitch within none [label %catch] unwind to caller
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catch: ; preds = %catch.dispatch
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%2 = catchpad within %1 [i8* null, i32 64, i8* null]
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call void @"?bb@@YAXPEAHH@Z"(i32* nonnull %a, i32* %a) [ "funclet"(token %2) ]
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catchret from %2 to label %try.cont
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try.cont: ; preds = %entry, %catch
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call void @"?cc@@YAXXZ"()
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1)
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declare dso_local void @"?bb@@YAXPEAHH@Z"(i32*, i32*)
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declare dso_local i32 @__CxxFrameHandler3(...)
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declare dso_local void @"?cc@@YAXXZ"()
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