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llvm-project/llvm/test/CodeGen/Hexagon/mux-kill1.mir

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[Hexagon] Don't kill live registers when creating mux out of tfr When a mux instruction is created from a pair of complementary conditional transfers, it can be placed at the location of either the earlier or the later of the transfers. Since it will use the operands of the original transfers, putting it in the earlier location may hoist a kill of a source register that was originally further down. Make sure the kill flag is removed if the register is still used afterwards. llvm-svn: 305300
2017-06-14 00:07:36 +08:00
# RUN: llc -march=hexagon -run-pass hexagon-gen-mux -o - %s -verify-machineinstrs | FileCheck %s
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux Remove the previous, manual shuffling of the kill flags. llvm-svn: 306054
2017-06-23 04:43:02 +08:00
# CHECK: %r2 = C2_mux killed %p0, killed %r0, %r1
[Hexagon] Don't kill live registers when creating mux out of tfr When a mux instruction is created from a pair of complementary conditional transfers, it can be placed at the location of either the earlier or the later of the transfers. Since it will use the operands of the original transfers, putting it in the earlier location may hoist a kill of a source register that was originally further down. Make sure the kill flag is removed if the register is still used afterwards. llvm-svn: 305300
2017-06-14 00:07:36 +08:00
---
name: fred
tracksRegLiveness: true
body: |
bb.0:
liveins: %d0, %p0
%r2 = A2_tfrt %p0, %r0
%r0 = A2_tfr %r1
%r2 = A2_tfrf %p0, killed %r1
...