2015-07-30 06:32:47 +08:00
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//===-- X86MachineFunctionInfo.cpp - X86 machine function info ------------===//
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2012-02-18 20:03:15 +08:00
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2012-02-18 20:03:15 +08:00
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//
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2011-12-20 10:50:00 +08:00
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//===----------------------------------------------------------------------===//
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#include "X86MachineFunctionInfo.h"
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2014-12-04 08:56:38 +08:00
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#include "X86RegisterInfo.h"
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2017-03-14 17:09:26 +08:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2017-11-17 09:07:10 +08:00
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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2011-12-20 10:50:00 +08:00
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using namespace llvm;
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void X86MachineFunctionInfo::anchor() { }
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2014-12-04 08:56:38 +08:00
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void X86MachineFunctionInfo::setRestoreBasePointer(const MachineFunction *MF) {
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if (!RestoreBasePointerOffset) {
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const X86RegisterInfo *RegInfo = static_cast<const X86RegisterInfo *>(
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MF->getSubtarget().getRegisterInfo());
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unsigned SlotSize = RegInfo->getSlotSize();
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2017-03-14 17:09:26 +08:00
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for (const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs();
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unsigned Reg = *CSR; ++CSR) {
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2014-12-04 08:56:38 +08:00
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if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
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RestoreBasePointerOffset -= SlotSize;
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}
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}
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}
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