2009-11-04 07:52:08 +08:00
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//===---------------------- ProcessImplicitDefs.cpp -----------------------===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2009-11-04 07:52:08 +08:00
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//
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//===----------------------------------------------------------------------===//
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2012-06-26 02:12:18 +08:00
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#include "llvm/ADT/SetVector.h"
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2009-11-04 07:52:08 +08:00
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#include "llvm/Analysis/AliasAnalysis.h"
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2012-06-23 06:27:36 +08:00
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#include "llvm/CodeGen/MachineFunctionPass.h"
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2009-11-04 07:52:08 +08:00
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2017-11-08 09:01:31 +08:00
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#include "llvm/CodeGen/TargetInstrInfo.h"
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2017-11-17 09:07:10 +08:00
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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Sink all InitializePasses.h includes
This file lists every pass in LLVM, and is included by Pass.h, which is
very popular. Every time we add, remove, or rename a pass in LLVM, it
caused lots of recompilation.
I found this fact by looking at this table, which is sorted by the
number of times a file was changed over the last 100,000 git commits
multiplied by the number of object files that depend on it in the
current checkout:
recompiles touches affected_files header
342380 95 3604 llvm/include/llvm/ADT/STLExtras.h
314730 234 1345 llvm/include/llvm/InitializePasses.h
307036 118 2602 llvm/include/llvm/ADT/APInt.h
213049 59 3611 llvm/include/llvm/Support/MathExtras.h
170422 47 3626 llvm/include/llvm/Support/Compiler.h
162225 45 3605 llvm/include/llvm/ADT/Optional.h
158319 63 2513 llvm/include/llvm/ADT/Triple.h
140322 39 3598 llvm/include/llvm/ADT/StringRef.h
137647 59 2333 llvm/include/llvm/Support/Error.h
131619 73 1803 llvm/include/llvm/Support/FileSystem.h
Before this change, touching InitializePasses.h would cause 1345 files
to recompile. After this change, touching it only causes 550 compiles in
an incremental rebuild.
Reviewers: bkramer, asbirlea, bollu, jdoerfert
Differential Revision: https://reviews.llvm.org/D70211
2019-11-14 05:15:01 +08:00
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#include "llvm/InitializePasses.h"
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2022-03-08 07:25:52 +08:00
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#include "llvm/Pass.h"
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#include "llvm/PassRegistry.h"
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2009-11-04 07:52:08 +08:00
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#include "llvm/Support/Debug.h"
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2012-06-26 02:12:18 +08:00
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#include "llvm/Support/raw_ostream.h"
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2009-11-04 07:52:08 +08:00
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using namespace llvm;
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2017-05-26 05:26:32 +08:00
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#define DEBUG_TYPE "processimpdefs"
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2014-04-22 10:02:50 +08:00
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2012-06-23 06:27:36 +08:00
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namespace {
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/// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
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/// for each use. Add isUndef marker to implicit_def defs and their uses.
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class ProcessImplicitDefs : public MachineFunctionPass {
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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MachineRegisterInfo *MRI;
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2012-06-26 02:12:18 +08:00
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SmallSetVector<MachineInstr*, 16> WorkList;
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void processImplicitDef(MachineInstr *MI);
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bool canTurnIntoImplicitDef(MachineInstr *MI);
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2012-06-23 06:27:36 +08:00
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public:
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static char ID;
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ProcessImplicitDefs() : MachineFunctionPass(ID) {
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initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
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}
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2014-03-07 17:26:03 +08:00
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void getAnalysisUsage(AnalysisUsage &au) const override;
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2012-06-23 06:27:36 +08:00
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2018-07-17 02:51:40 +08:00
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bool runOnMachineFunction(MachineFunction &MF) override;
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2012-06-23 06:27:36 +08:00
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};
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} // end anonymous namespace
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2009-11-04 07:52:08 +08:00
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char ProcessImplicitDefs::ID = 0;
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2012-02-10 12:10:36 +08:00
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char &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID;
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2017-05-26 05:26:32 +08:00
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INITIALIZE_PASS(ProcessImplicitDefs, DEBUG_TYPE,
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2010-12-29 19:49:10 +08:00
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"Process Implicit Definitions", false, false)
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2009-11-04 07:52:08 +08:00
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void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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[PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible
with the new pass manager, and no longer relying on analysis groups.
This builds essentially a ground-up new AA infrastructure stack for
LLVM. The core ideas are the same that are used throughout the new pass
manager: type erased polymorphism and direct composition. The design is
as follows:
- FunctionAAResults is a type-erasing alias analysis results aggregation
interface to walk a single query across a range of results from
different alias analyses. Currently this is function-specific as we
always assume that aliasing queries are *within* a function.
- AAResultBase is a CRTP utility providing stub implementations of
various parts of the alias analysis result concept, notably in several
cases in terms of other more general parts of the interface. This can
be used to implement only a narrow part of the interface rather than
the entire interface. This isn't really ideal, this logic should be
hoisted into FunctionAAResults as currently it will cause
a significant amount of redundant work, but it faithfully models the
behavior of the prior infrastructure.
- All the alias analysis passes are ported to be wrapper passes for the
legacy PM and new-style analysis passes for the new PM with a shared
result object. In some cases (most notably CFL), this is an extremely
naive approach that we should revisit when we can specialize for the
new pass manager.
- BasicAA has been restructured to reflect that it is much more
fundamentally a function analysis because it uses dominator trees and
loop info that need to be constructed for each function.
All of the references to getting alias analysis results have been
updated to use the new aggregation interface. All the preservation and
other pass management code has been updated accordingly.
The way the FunctionAAResultsWrapperPass works is to detect the
available alias analyses when run, and add them to the results object.
This means that we should be able to continue to respect when various
passes are added to the pipeline, for example adding CFL or adding TBAA
passes should just cause their results to be available and to get folded
into this. The exception to this rule is BasicAA which really needs to
be a function pass due to using dominator trees and loop info. As
a consequence, the FunctionAAResultsWrapperPass directly depends on
BasicAA and always includes it in the aggregation.
This has significant implications for preserving analyses. Generally,
most passes shouldn't bother preserving FunctionAAResultsWrapperPass
because rebuilding the results just updates the set of known AA passes.
The exception to this rule are LoopPass instances which need to preserve
all the function analyses that the loop pass manager will end up
needing. This means preserving both BasicAAWrapperPass and the
aggregating FunctionAAResultsWrapperPass.
Now, when preserving an alias analysis, you do so by directly preserving
that analysis. This is only necessary for non-immutable-pass-provided
alias analyses though, and there are only three of interest: BasicAA,
GlobalsAA (formerly GlobalsModRef), and SCEVAA. Usually BasicAA is
preserved when needed because it (like DominatorTree and LoopInfo) is
marked as a CFG-only pass. I've expanded GlobalsAA into the preserved
set everywhere we previously were preserving all of AliasAnalysis, and
I've added SCEVAA in the intersection of that with where we preserve
SCEV itself.
One significant challenge to all of this is that the CGSCC passes were
actually using the alias analysis implementations by taking advantage of
a pretty amazing set of loop holes in the old pass manager's analysis
management code which allowed analysis groups to slide through in many
cases. Moving away from analysis groups makes this problem much more
obvious. To fix it, I've leveraged the flexibility the design of the new
PM components provides to just directly construct the relevant alias
analyses for the relevant functions in the IPO passes that need them.
This is a bit hacky, but should go away with the new pass manager, and
is already in many ways cleaner than the prior state.
Another significant challenge is that various facilities of the old
alias analysis infrastructure just don't fit any more. The most
significant of these is the alias analysis 'counter' pass. That pass
relied on the ability to snoop on AA queries at different points in the
analysis group chain. Instead, I'm planning to build printing
functionality directly into the aggregation layer. I've not included
that in this patch merely to keep it smaller.
Note that all of this needs a nearly complete rewrite of the AA
documentation. I'm planning to do that, but I'd like to make sure the
new design settles, and to flesh out a bit more of what it looks like in
the new pass manager first.
Differential Revision: http://reviews.llvm.org/D12080
llvm-svn: 247167
2015-09-10 01:55:00 +08:00
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AU.addPreserved<AAResultsWrapperPass>();
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2009-11-04 07:52:08 +08:00
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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2012-06-26 02:12:18 +08:00
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bool ProcessImplicitDefs::canTurnIntoImplicitDef(MachineInstr *MI) {
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if (!MI->isCopyLike() &&
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!MI->isInsertSubreg() &&
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!MI->isRegSequence() &&
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!MI->isPHI())
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2010-07-14 09:22:19 +08:00
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return false;
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2015-05-29 10:56:46 +08:00
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for (const MachineOperand &MO : MI->operands())
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if (MO.isReg() && MO.isUse() && MO.readsReg())
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2012-06-26 02:12:18 +08:00
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return false;
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return true;
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2010-07-14 09:22:19 +08:00
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}
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2012-06-26 02:12:18 +08:00
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void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) {
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2018-05-14 20:53:11 +08:00
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LLVM_DEBUG(dbgs() << "Processing " << *MI);
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Depends on D65919
Reviewers: arsenm, bogner, craig.topper, RKSimon
Reviewed By: arsenm
Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65962
llvm-svn: 369041
2019-08-16 03:22:08 +08:00
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Register Reg = MI->getOperand(0).getReg();
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2012-06-26 02:12:18 +08:00
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2019-08-02 07:27:28 +08:00
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if (Register::isVirtualRegister(Reg)) {
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2013-10-05 00:52:58 +08:00
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// For virtual registers, mark all uses as <undef>, and convert users to
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2012-06-26 02:12:18 +08:00
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// implicit-def when possible.
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2014-03-18 03:36:09 +08:00
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for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
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2012-06-26 02:12:18 +08:00
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MO.setIsUndef();
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MachineInstr *UserMI = MO.getParent();
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if (!canTurnIntoImplicitDef(UserMI))
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2009-11-04 07:52:08 +08:00
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continue;
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2018-05-14 20:53:11 +08:00
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LLVM_DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI);
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2012-06-26 02:12:18 +08:00
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UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
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WorkList.insert(UserMI);
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2009-11-04 07:52:08 +08:00
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}
|
2012-06-26 02:12:18 +08:00
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MI->eraseFromParent();
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return;
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}
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2009-11-04 07:52:08 +08:00
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2012-06-26 02:12:18 +08:00
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// This is a physreg implicit-def.
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// Look for the first instruction to use or define an alias.
|
2016-02-23 04:49:58 +08:00
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MachineBasicBlock::instr_iterator UserMI = MI->getIterator();
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MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end();
|
2012-06-26 02:12:18 +08:00
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bool Found = false;
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for (++UserMI; UserMI != UserE; ++UserMI) {
|
2015-05-29 10:56:46 +08:00
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for (MachineOperand &MO : UserMI->operands()) {
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if (!MO.isReg())
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2009-11-04 07:52:08 +08:00
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continue;
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Depends on D65919
Reviewers: arsenm, bogner, craig.topper, RKSimon
Reviewed By: arsenm
Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65962
llvm-svn: 369041
2019-08-16 03:22:08 +08:00
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Register UserReg = MO.getReg();
|
2019-08-02 07:27:28 +08:00
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if (!Register::isPhysicalRegister(UserReg) ||
|
2012-06-26 02:12:18 +08:00
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!TRI->regsOverlap(Reg, UserReg))
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2009-11-04 07:52:08 +08:00
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continue;
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2012-06-26 02:12:18 +08:00
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// UserMI uses or redefines Reg. Set <undef> flags on all uses.
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Found = true;
|
2015-05-29 10:56:46 +08:00
|
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if (MO.isUse())
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MO.setIsUndef();
|
2012-06-26 02:12:18 +08:00
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}
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if (Found)
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break;
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}
|
2009-11-04 07:52:08 +08:00
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2012-06-26 02:12:18 +08:00
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// If we found the using MI, we can erase the IMPLICIT_DEF.
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if (Found) {
|
2018-05-14 20:53:11 +08:00
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LLVM_DEBUG(dbgs() << "Physreg user: " << *UserMI);
|
2012-06-26 02:12:18 +08:00
|
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MI->eraseFromParent();
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return;
|
|
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|
}
|
2009-11-26 05:13:39 +08:00
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2012-06-26 02:12:18 +08:00
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// Using instr wasn't found, it could be in another block.
|
|
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// Leave the physreg IMPLICIT_DEF, but trim any extra operands.
|
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for (unsigned i = MI->getNumOperands() - 1; i; --i)
|
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MI->RemoveOperand(i);
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "Keeping physreg: " << *MI);
|
2012-06-26 02:12:18 +08:00
|
|
|
}
|
2009-11-04 07:52:08 +08:00
|
|
|
|
2012-06-26 02:12:18 +08:00
|
|
|
/// processImplicitDefs - Process IMPLICIT_DEF instructions and turn them into
|
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/// <undef> operands.
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bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) {
|
2009-11-26 05:13:39 +08:00
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|
2018-05-14 20:53:11 +08:00
|
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|
LLVM_DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n"
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<< "********** Function: " << MF.getName() << '\n');
|
2009-11-26 05:13:39 +08:00
|
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|
2012-06-26 02:12:18 +08:00
|
|
|
bool Changed = false;
|
2009-11-04 07:52:08 +08:00
|
|
|
|
2014-08-05 10:39:49 +08:00
|
|
|
TII = MF.getSubtarget().getInstrInfo();
|
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TRI = MF.getSubtarget().getRegisterInfo();
|
2012-06-26 02:12:18 +08:00
|
|
|
MRI = &MF.getRegInfo();
|
|
|
|
assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form.");
|
|
|
|
assert(WorkList.empty() && "Inconsistent worklist state");
|
|
|
|
|
2021-02-18 15:58:46 +08:00
|
|
|
for (MachineBasicBlock &MBB : MF) {
|
2012-06-26 02:12:18 +08:00
|
|
|
// Scan the basic block for implicit defs.
|
2021-02-18 15:58:46 +08:00
|
|
|
for (MachineInstr &MI : MBB)
|
|
|
|
if (MI.isImplicitDef())
|
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|
|
WorkList.insert(&MI);
|
2012-06-26 02:12:18 +08:00
|
|
|
|
|
|
|
if (WorkList.empty())
|
|
|
|
continue;
|
|
|
|
|
2021-02-18 15:58:46 +08:00
|
|
|
LLVM_DEBUG(dbgs() << printMBBReference(MBB) << " has " << WorkList.size()
|
2018-05-14 20:53:11 +08:00
|
|
|
<< " implicit defs.\n");
|
2012-06-26 02:12:18 +08:00
|
|
|
Changed = true;
|
|
|
|
|
|
|
|
// Drain the WorkList to recursively process any new implicit defs.
|
|
|
|
do processImplicitDef(WorkList.pop_back_val());
|
|
|
|
while (!WorkList.empty());
|
2009-11-04 07:52:08 +08:00
|
|
|
}
|
|
|
|
return Changed;
|
|
|
|
}
|