2018-05-04 23:09:49 +08:00
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# REQUIRES: ppc
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[PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.
When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.
If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.
addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA
ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
ld/lwa 3, 0(3) # load the value from the address
.section .toc,"aw",@progbits
.LC0: .tc var[TC],var
can be relaxed to
addis 3,2,var@toc@ha # this may be relaxed to a nop,
addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc
ld/lwa 3, 0(3) # load the value from the address
We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s
Reviewed By: ruiu, sfertile
Differential Revision: https://reviews.llvm.org/D60958
llvm-svn: 360112
2019-05-07 12:26:05 +08:00
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# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
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# RUN: ld.lld --no-toc-optimize %t.o -o %t
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# RUN: llvm-readelf -x .rodata -x .eh_frame %t | FileCheck %s --check-prefix=DATALE
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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2018-05-04 23:09:49 +08:00
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[PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.
When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.
If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.
addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA
ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
ld/lwa 3, 0(3) # load the value from the address
.section .toc,"aw",@progbits
.LC0: .tc var[TC],var
can be relaxed to
addis 3,2,var@toc@ha # this may be relaxed to a nop,
addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc
ld/lwa 3, 0(3) # load the value from the address
We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s
Reviewed By: ruiu, sfertile
Differential Revision: https://reviews.llvm.org/D60958
llvm-svn: 360112
2019-05-07 12:26:05 +08:00
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# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
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# RUN: ld.lld --no-toc-optimize %t.o -o %t
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# RUN: llvm-readelf -x .rodata -x .eh_frame %t | FileCheck %s --check-prefix=DATABE
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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2015-10-13 04:56:18 +08:00
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2018-05-04 23:09:49 +08:00
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.text
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2015-10-13 04:56:18 +08:00
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.global _start
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_start:
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.Lfoo:
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li 0,1
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li 3,42
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sc
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2018-05-14 23:26:44 +08:00
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.section .rodata,"a",@progbits
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.p2align 2
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.LJTI0_0:
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.long .LBB0_2-.LJTI0_0
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.section .toc,"aw",@progbits
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2015-10-13 04:56:18 +08:00
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.L1:
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.quad 22, 37, 89, 47
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2018-05-14 23:26:44 +08:00
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.LC0:
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.tc .LJTI0_0[TC],.LJTI0_0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_TOC16_LO_DS,"ax",@progbits
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.globl .FR_PPC64_TOC16_LO_DS
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.FR_PPC64_TOC16_LO_DS:
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ld 1, .L1@toc@l(2)
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# CHECK: Disassembly of section .R_PPC64_TOC16_LO_DS:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_TOC16_LO_DS:
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2019-04-23 19:47:28 +08:00
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# CHECK: 1001000c: ld 1, -32768(2)
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_TOC16_LO,"ax",@progbits
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.globl .FR_PPC64_TOC16_LO
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.FR_PPC64_TOC16_LO:
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addi 1, 2, .L1@toc@l
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# CHECK: Disassembly of section .R_PPC64_TOC16_LO:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_TOC16_LO:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010010: addi 1, 2, -32768
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_TOC16_HI,"ax",@progbits
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.globl .FR_PPC64_TOC16_HI
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.FR_PPC64_TOC16_HI:
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addis 1, 2, .L1@toc@h
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# CHECK: Disassembly of section .R_PPC64_TOC16_HI:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_TOC16_HI:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010014: addis 1, 2, -1
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_TOC16_HA,"ax",@progbits
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.globl .FR_PPC64_TOC16_HA
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.FR_PPC64_TOC16_HA:
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addis 1, 2, .L1@toc@ha
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# CHECK: Disassembly of section .R_PPC64_TOC16_HA:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_TOC16_HA:
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[PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.
When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.
If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.
addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA
ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
ld/lwa 3, 0(3) # load the value from the address
.section .toc,"aw",@progbits
.LC0: .tc var[TC],var
can be relaxed to
addis 3,2,var@toc@ha # this may be relaxed to a nop,
addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc
ld/lwa 3, 0(3) # load the value from the address
We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s
Reviewed By: ruiu, sfertile
Differential Revision: https://reviews.llvm.org/D60958
llvm-svn: 360112
2019-05-07 12:26:05 +08:00
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# CHECK: 10010018: addis 1, 2, 0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_REL24,"ax",@progbits
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.globl .FR_PPC64_REL24
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.FR_PPC64_REL24:
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b .Lfoox
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.section .R_PPC64_REL24_2,"ax",@progbits
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.Lfoox:
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# CHECK: Disassembly of section .R_PPC64_REL24:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_REL24:
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2019-04-23 19:47:28 +08:00
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# CHECK: 1001001c: b .+4
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2015-10-13 04:56:18 +08:00
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2018-12-04 20:26:21 +08:00
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.section .R_PPC64_REL14,"ax",@progbits
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.globl .FR_PPC64_REL14
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.FR_PPC64_REL14:
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beq .Lfooy
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.section .R_PPC64_REL14_2,"ax",@progbits
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.Lfooy:
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# CHECK: Disassembly of section .R_PPC64_REL14:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2018-12-04 20:26:21 +08:00
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# CHECK: .FR_PPC64_REL14:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010020: bt 2, .+4
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2018-12-04 20:26:21 +08:00
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_LO,"ax",@progbits
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.globl .FR_PPC64_ADDR16_LO
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.FR_PPC64_ADDR16_LO:
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li 1, .Lfoo@l
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# CHECK: Disassembly of section .R_PPC64_ADDR16_LO:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_LO:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010024: li 1, 0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HI,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HI
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.FR_PPC64_ADDR16_HI:
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li 1, .Lfoo@h
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HI:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HI:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010028: li 1, 4097
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HA,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HA
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.FR_PPC64_ADDR16_HA:
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li 1, .Lfoo@ha
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HA:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HA:
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2019-04-23 19:47:28 +08:00
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# CHECK: 1001002c: li 1, 4097
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HIGHER,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HIGHER
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.FR_PPC64_ADDR16_HIGHER:
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li 1, .Lfoo@higher
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HIGHER:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HIGHER:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010030: li 1, 0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HIGHERA,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HIGHERA
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.FR_PPC64_ADDR16_HIGHERA:
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li 1, .Lfoo@highera
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HIGHERA:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HIGHERA:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010034: li 1, 0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HIGHEST,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HIGHEST
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.FR_PPC64_ADDR16_HIGHEST:
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li 1, .Lfoo@highest
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HIGHEST:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HIGHEST:
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010038: li 1, 0
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2015-10-13 04:56:18 +08:00
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.section .R_PPC64_ADDR16_HIGHESTA,"ax",@progbits
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.globl .FR_PPC64_ADDR16_HIGHESTA
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.FR_PPC64_ADDR16_HIGHESTA:
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li 1, .Lfoo@highesta
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# CHECK: Disassembly of section .R_PPC64_ADDR16_HIGHESTA:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2015-10-13 04:56:18 +08:00
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# CHECK: .FR_PPC64_ADDR16_HIGHESTA:
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2019-04-23 19:47:28 +08:00
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# CHECK: 1001003c: li 1, 0
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2015-10-13 04:56:18 +08:00
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2018-05-14 23:26:44 +08:00
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.section .R_PPC64_REL32, "ax",@progbits
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.globl .FR_PPC64_REL32
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.FR_PPC64_REL32:
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addis 5, 2, .LC0@toc@ha
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ld 5, .LC0@toc@l(5)
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.LBB0_2:
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add 3, 3, 4
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2019-04-23 19:47:28 +08:00
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# DATALE: '.rodata':
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# DATALE: 0x100001c8 80fe0000
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2018-05-14 23:26:44 +08:00
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2019-04-23 19:47:28 +08:00
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# DATABE: '.rodata':
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# DATABE: 0x100001c8 0000fe80
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2018-05-14 23:26:44 +08:00
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# Address of rodata + value stored at rodata entry
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# should equal address of LBB0_2.
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# 0x10000190 + 0xfeb4 = 0x10010044
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# CHECK: Disassembly of section .R_PPC64_REL32:
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2019-05-01 18:40:48 +08:00
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# CHECK-EMPTY:
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2018-05-14 23:26:44 +08:00
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# CHECK: .FR_PPC64_REL32:
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[PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.
When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.
If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.
addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA
ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
ld/lwa 3, 0(3) # load the value from the address
.section .toc,"aw",@progbits
.LC0: .tc var[TC],var
can be relaxed to
addis 3,2,var@toc@ha # this may be relaxed to a nop,
addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc
ld/lwa 3, 0(3) # load the value from the address
We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s
Reviewed By: ruiu, sfertile
Differential Revision: https://reviews.llvm.org/D60958
llvm-svn: 360112
2019-05-07 12:26:05 +08:00
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# CHECK: 10010040: addis 5, 2, 0
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# CHECK: 10010044: ld 5, -32736(5)
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2019-04-23 19:47:28 +08:00
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# CHECK: 10010048: add 3, 3, 4
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2018-05-15 00:39:45 +08:00
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.section .R_PPC64_REL64, "ax",@progbits
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.globl .FR_PPC64_REL64
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.FR_PPC64_REL64:
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.cfi_startproc
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.cfi_personality 148, __foo
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li 0, 1
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li 3, 55
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sc
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.cfi_endproc
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__foo:
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li 3,0
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2019-04-23 19:47:28 +08:00
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# Check that the personality (relocated by R_PPC64_REL64) in the .eh_frame
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# equals the address of __foo.
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# 0x100001e2 + 0x76fe = 0x10010058
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# DATALE: section '.eh_frame':
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# DATALE: 0x100001e0 {{....}}76fe
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2018-05-15 00:39:45 +08:00
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2019-04-23 19:47:28 +08:00
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# DATABE: section '.eh_frame':
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# DATABE: 0x100001e0 {{[0-9a-f]+ [0-9a-f]+}} fe76{{....}}
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2018-05-15 00:39:45 +08:00
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# CHECK: __foo
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2019-04-23 19:47:28 +08:00
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# CHECK-NEXT: 10010058: li 3, 0
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