forked from OSchip/llvm-project
67 lines
2.0 KiB
LLVM
67 lines
2.0 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=mips -mcpu=mips32 -relocation-model=pic \
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; RUN: < %s 2>&1 | FileCheck %s --check-prefix=32
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; RUN: llc -mtriple=mips -mcpu=mips32 -relocation-model=pic -mattr=+micromips \
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; RUN: < %s 2>&1 | FileCheck %s --check-prefix=MM
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; RUN: llc -mtriple=mips64 -mcpu=mips64 -relocation-model=pic \
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; RUN: < %s 2>&1 | FileCheck %s --check-prefix=64
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@x = global i32 0
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@a = global i32 0
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@b = global i32 0
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define void @foo() {
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; 32-LABEL: foo:
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; 32: # %bb.0: # %entry
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; 32-NEXT: lui $2, %hi(_gp_disp)
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; 32-NEXT: addiu $2, $2, %lo(_gp_disp)
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; 32-NEXT: addu $1, $2, $25
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; 32-NEXT: lw $2, %got(x)($1)
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; 32-NEXT: lw $3, 0($2)
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; 32-NEXT: addiu $4, $1, %got(b)
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; 32-NEXT: addiu $1, $1, %got(a)
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; 32-NEXT: movz $4, $1, $3
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; 32-NEXT: lw $1, 0($4)
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; 32-NEXT: lw $1, 0($1)
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; 32-NEXT: jr $ra
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; 32-NEXT: sw $1, 0($2)
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;
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; MM-LABEL: foo:
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; MM: # %bb.0: # %entry
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; MM-NEXT: lui $2, %hi(_gp_disp)
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; MM-NEXT: addiu $2, $2, %lo(_gp_disp)
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; MM-NEXT: addu $2, $2, $25
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; MM-NEXT: lw $3, %got(x)($2)
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; MM-NEXT: lw16 $4, 0($3)
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; MM-NEXT: addiu $5, $2, %got(b)
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; MM-NEXT: addiu $1, $2, %got(a)
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; MM-NEXT: movz $5, $1, $4
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; MM-NEXT: lw16 $2, 0($5)
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; MM-NEXT: lw16 $2, 0($2)
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; MM-NEXT: sw16 $2, 0($3)
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; MM-NEXT: jrc $ra
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;
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; 64-LABEL: foo:
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; 64: # %bb.0: # %entry
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; 64-NEXT: lui $1, %hi(%neg(%gp_rel(foo)))
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; 64-NEXT: daddu $1, $1, $25
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; 64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(foo)))
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; 64-NEXT: ld $2, %got_disp(x)($1)
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; 64-NEXT: lw $3, 0($2)
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; 64-NEXT: daddiu $4, $1, %got_disp(b)
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; 64-NEXT: daddiu $1, $1, %got_disp(a)
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; 64-NEXT: movz $4, $1, $3
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; 64-NEXT: ld $1, 0($4)
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; 64-NEXT: lw $1, 0($1)
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; 64-NEXT: jr $ra
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; 64-NEXT: sw $1, 0($2)
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entry:
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%0 = load i32, i32* @x, align 4
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%cmp2 = icmp eq i32 %0, 0
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%1 = load i32, i32* @a, align 4
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%2 = load i32, i32* @b, align 4
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%cond = select i1 %cmp2, i32 %1, i32 %2
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store i32 %cond, i32* @x, align 4
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ret void
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}
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