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llvm-project/llvm/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll

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[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefix=CHECK-NO-DSP
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m4 %s -o - | FileCheck %s --check-prefix=CHECK-DSP
; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP
; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP
; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. llvm-svn: 137061
2011-08-09 03:49:37 +08:00
define i32 @test1(i16 zeroext %z) nounwind {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
2013-07-14 04:38:47 +08:00
; CHECK-LABEL: test1:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxth
; CHECK-NO-DSP: sxth
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. llvm-svn: 137061
2011-08-09 03:49:37 +08:00
%r = sext i16 %z to i32
ret i32 %r
}
define i32 @test2(i8 zeroext %z) nounwind {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
2013-07-14 04:38:47 +08:00
; CHECK-LABEL: test2:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxtb
; CHECK-NO-DSP: sxtb
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. llvm-svn: 137061
2011-08-09 03:49:37 +08:00
%r = sext i8 %z to i32
ret i32 %r
}
define i32 @test3(i16 signext %z) nounwind {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
2013-07-14 04:38:47 +08:00
; CHECK-LABEL: test3:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: uxth
; CHECK-NO-DSP: uxth
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. llvm-svn: 137061
2011-08-09 03:49:37 +08:00
%r = zext i16 %z to i32
ret i32 %r
}
define i32 @test4(i8 signext %z) nounwind {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
2013-07-14 04:38:47 +08:00
; CHECK-LABEL: test4:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: uxtb
; CHECK-NO-DSP: uxtb
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. llvm-svn: 137061
2011-08-09 03:49:37 +08:00
%r = zext i8 %z to i32
ret i32 %r
}
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
define i32 @test5(i32 %a, i8 %b) {
; CHECK-LABEL: test5:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxtab r0, r0, r1
; CHECK-NO-DSP-NOT: sxtab
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%sext = sext i8 %b to i32
%add = add i32 %a, %sext
ret i32 %add
}
define i32 @test6(i32 %a, i32 %b) {
; CHECK-LABEL: test6:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxtab r0, r0, r1
; CHECK-NO-DSP-NOT: sxtab
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%shl = shl i32 %b, 24
%ashr = ashr i32 %shl, 24
%add = add i32 %a, %ashr
ret i32 %add
}
define i32 @test7(i32 %a, i16 %b) {
; CHECK-LABEL: test7:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxtah r0, r0, r1
; CHECK-NO-DSPNOT: sxtah
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%sext = sext i16 %b to i32
%add = add i32 %a, %sext
ret i32 %add
}
define i32 @test8(i32 %a, i32 %b) {
; CHECK-LABEL: test8:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: sxtah r0, r0, r1
; CHECK-NO-DSP-NOT: sxtah
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%shl = shl i32 %b, 16
%ashr = ashr i32 %shl, 16
%add = add i32 %a, %ashr
ret i32 %add
}
define i32 @test9(i32 %a, i8 %b) {
; CHECK-LABEL: test9:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: uxtab r0, r0, r1
; CHECK-NO-DSP-NOT: uxtab
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%zext = zext i8 %b to i32
%add = add i32 %a, %zext
ret i32 %add
}
define i32 @test10(i32 %a, i32 %b) {
;CHECK-LABEL: test10:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
;CHECK-DSP: uxtab r0, r0, r1
;CHECK-NO-DSP-NOT: uxtab
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%and = and i32 %b, 255
%add = add i32 %a, %and
ret i32 %add
}
define i32 @test11(i32 %a, i16 %b) {
; CHECK-LABEL: test11:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
; CHECK-DSP: uxtah r0, r0, r1
; CHECK-NO-DSP-NOT: uxtah
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%zext = zext i16 %b to i32
%add = add i32 %a, %zext
ret i32 %add
}
define i32 @test12(i32 %a, i32 %b) {
;CHECK-LABEL: test12:
[ARM] Replace HasT2ExtractPack with HasDSP Removed the HasT2ExtractPack feature and replaced its references with HasDSP. This then allows the Thumb2 extend instructions to be selected for ARMv8M +dsp. These instruction descriptions have also been refactored and more target tests have been added for their isel. Differential Revision: https://reviews.llvm.org/D29623 llvm-svn: 295452
2017-02-17 23:42:44 +08:00
;CHECK-DSP: uxtah r0, r0, r1
;CHECK-NO-DSP-NOT: uxtah
[ARM] Improve sxta{b|h} and uxta{b|h} tests Created a Thumb2 predicated pattern matcher that uses Thumb2 and HasT2ExtractPack and used it to redefine the patterns for sxta{b|h} and uxta{b|h}. Also used the similar patterns to fill in isel pattern gaps for the corresponding instructions in the ARM backend. The patch is mainly changes to tests since most of this functionality appears not to have been tested. Differential Revision: https://reviews.llvm.org/D23273 llvm-svn: 278207
2016-08-10 17:34:34 +08:00
%and = and i32 %b, 65535
%add = add i32 %a, %and
ret i32 %add
}