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llvm-project/llvm/test/CodeGen/ARM/large-vector.ll

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ARM: don't try to over-align large vectors as arguments. By default LLVM thinks very large vectors get aligned to their size when passed across functions. Unfortunately no-one told the ARM backend so it doesn't trigger stack realignment and so accesses can cause the usual misalignment issues (e.g. a data abort). This changes the ABI alignment to the stack alignment, which in practice (and as a bonus) also coincides with the alignment "natural" vectors get. llvm-svn: 331451
2018-05-03 20:54:25 +08:00
; RUN: llc -mtriple=thumbv7k-apple-watchos %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V7K
; RUN: llc -mtriple=thumbv7-linux-gnueabihf %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AAPCS
; RUN: llc -mtriple=thumbv7-apple-ios %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-APCS
define <32 x i8> @test_consume_arg([9 x double], <32 x i8> %vec) {
; CHECK-LABEL: test_consume_arg:
; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #16
; CHECK-V7K: vld1.64 {d0, d1}, [r[[BASE]]:128]
; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #32
; CHECK-V7K: vld1.64 {d2, d3}, [r[[BASE]]:128]
; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #8
; CHECK-AAPCS: vld1.64 {d0, d1}, [r[[BASE]]]
; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #24
; CHECK-AAPCS: vld1.64 {d2, d3}, [r[[BASE]]]
; CHECK-APCS: add r[[BASE:[0-9]+]], sp, #76
; CHECK-APCS: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
; CHECK-APCS: add r[[BASE:[0-9]+]], sp, #60
; CHECK-APCS: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
ret <32 x i8> %vec
}
define void @test_produce_arg() {
; CHECK-LABEL: test_produce_arg:
; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #32
; CHECK-V7K: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]:128]
; CHECK-V7K: add r[[BASE:[0-9]+]], sp, #16
; CHECK-V7K: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]:128]
; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #24
; CHECK-AAPCS: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
; CHECK-AAPCS: add r[[BASE:[0-9]+]], sp, #8
; CHECK-AAPCS: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
; CHECK-APCS: add r[[BASE:[0-9]+]], sp, #60
; CHECK-APCS: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
; CHECK-APCS: mov r[[BASE:[0-9]+]], sp
; CHECK-APCS: str {{r[0-9]+}}, [r[[BASE]]], #76
; CHECK-APCS: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
call <32 x i8> @test_consume_arg([9 x double] undef, <32 x i8> zeroinitializer)
ret void
}