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llvm-project/llvm/test/MC/Mips/mips_directives.s

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Mips specific standalone assembler addressing mode %hi and %lo. The constructs %hi() and %lo() represent the high and low 16 bits of the address. Because the 16 bit offset field of an LW instruction is interpreted as signed, if bit 15 of the low part is 1 then the low part will act as a negative and 1 needs to be added to the high part. Contributer: Vladimir Medic llvm-svn: 175707
2013-02-21 10:09:31 +08:00
# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
[MC][AsmParser] Hook for post assembly file processing This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file directive processing. Mips assembly requires processing inline directives that directly and indirectly affect the output ELF header flags. This patch handles one ".abicalls". To process these directives we are following the model the code generator uses by storing state in a container as we go through processing and when we detect the end of input file processing, AsmParser is notified and we update the ELF header flags through a MipsELFStreamer method with a call from MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer). This patch will allow other targets the same functionality. Jack llvm-svn: 191982
2013-10-05 05:26:15 +08:00
# RUN: llvm-mc -filetype=obj -triple mips-unknown-unknown %s | \
# RUN: llvm-readobj -h | FileCheck -check-prefix=CHECK-ELF %s
Mips specific standalone assembler addressing mode %hi and %lo. The constructs %hi() and %lo() represent the high and low 16 bits of the address. Because the 16 bit offset field of an LW instruction is interpreted as signed, if bit 15 of the low part is 1 then the low part will act as a negative and 1 needs to be added to the high part. Contributer: Vladimir Medic llvm-svn: 175707
2013-02-21 10:09:31 +08:00
#
Mips assembler: .set reorder support Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
2013-04-26 07:31:35 +08:00
# CHECK: .text
# CHECK: $BB0_2:
The Mips standalone assembler intial directive support. Actually these are just stubs for parsing the directives. Semantic support will come later. Test cases included Contributer: Vladimir Medic llvm-svn: 163364
2012-09-07 08:48:02 +08:00
$BB0_2:
[MC][AsmParser] Hook for post assembly file processing This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file directive processing. Mips assembly requires processing inline directives that directly and indirectly affect the output ELF header flags. This patch handles one ".abicalls". To process these directives we are following the model the code generator uses by storing state in a container as we go through processing and when we detect the end of input file processing, AsmParser is notified and we update the ELF header flags through a MipsELFStreamer method with a call from MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer). This patch will allow other targets the same functionality. Jack llvm-svn: 191982
2013-10-05 05:26:15 +08:00
.ent directives_test
.abicalls
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
Mips assembler: .set reorder support Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
2013-04-26 07:31:35 +08:00
# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d]
# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c]
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.set noreorder
Mips assembler: .set reorder support Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
2013-04-26 07:31:35 +08:00
b 1332
j 1328
jal 1328
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.set nomacro
.set noat
The Mips standalone assembler intial directive support. Actually these are just stubs for parsing the directives. Semantic support will come later. Test cases included Contributer: Vladimir Medic llvm-svn: 163364
2012-09-07 08:48:02 +08:00
$JTI0_0:
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.gpword ($BB0_2)
.word 0x77fffffc
This patch implements parsing the .word directive for the Mips assembler. Contributer: Vladimir Medic llvm-svn: 173407
2013-01-25 09:31:34 +08:00
# CHECK: $JTI0_0:
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
# CHECK-NEXT: .4byte 2013265916
.set at=$12
.set macro
Mips assembler: .set reorder support Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
2013-04-26 07:31:35 +08:00
# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.set reorder
Mips assembler: .set reorder support Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
2013-04-26 07:31:35 +08:00
b 1332
j 1328
jal 1328
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
2013-02-21 07:11:17 +08:00
.set at=$a0
This patch enables the Mips .set directive to define aliases The .set directive in the Mips the assembler can be used to set the value of a symbol to an expression. This changes the symbol's value and type to conform to the expression's. Syntax: .set symbol, expression This patch implements the parsing of the above syntax and enables the parser to use defined symbols when parsing operands. Contributor: Vladimir Medic llvm-svn: 177667
2013-03-22 05:44:16 +08:00
.set STORE_MASK,$t7
.set FPU_MASK,$f7
Mips assembler: Improve set register alias handling This patch solves the problem of numeric register values not being accepted: ../set_alias.s:1:11: error: expected valid expression after comma .set r4,$4 ^ The parsing of .set directive is changed and handling of symbols in code as well to enable this feature. The test example is added. Patch by Vladimir Medic llvm-svn: 182807
2013-05-29 06:21:05 +08:00
.set r3,$3
Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers. llvm-svn: 184411
2013-06-20 19:21:49 +08:00
.set f6,$f6
Add support for Mips break and syscall insructions. The corresponding test cases are added. llvm-svn: 185999
2013-07-10 18:18:10 +08:00
# CHECK: abs.s $f6, $f7 # encoding: [0x46,0x00,0x39,0x85]
# CHECK: and $3, $15, $15 # encoding: [0x01,0xef,0x18,0x24]
Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers. llvm-svn: 184411
2013-06-20 19:21:49 +08:00
abs.s f6,FPU_MASK
Mips assembler: Improve set register alias handling This patch solves the problem of numeric register values not being accepted: ../set_alias.s:1:11: error: expected valid expression after comma .set r4,$4 ^ The parsing of .set directive is changed and handling of symbols in code as well to enable this feature. The test example is added. Patch by Vladimir Medic llvm-svn: 182807
2013-05-29 06:21:05 +08:00
and r3,$t7,STORE_MASK
[MC][AsmParser] Hook for post assembly file processing This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file directive processing. Mips assembly requires processing inline directives that directly and indirectly affect the output ELF header flags. This patch handles one ".abicalls". To process these directives we are following the model the code generator uses by storing state in a container as we go through processing and when we detect the end of input file processing, AsmParser is notified and we update the ELF header flags through a MipsELFStreamer method with a call from MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer). This patch will allow other targets the same functionality. Jack llvm-svn: 191982
2013-10-05 05:26:15 +08:00
# CHECK-ELF: Flags [ (0x6)