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llvm-project/llvm/lib/Target/R600/SIDefines.h

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R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
/// \file
//===----------------------------------------------------------------------===//
#ifndef SIDEFINES_H_
#define SIDEFINES_H_
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions The previous code declared the operand as unknown:$vaddr, which made it possible for scalar registers to be used instead of vector registers. llvm-svn: 188425
2013-08-15 07:24:17 +08:00
namespace SIInstrFlags {
enum {
MIMG = 1 << 3
};
}
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
R600/SI: Initial local memory support Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186012
2013-07-11 00:37:07 +08:00
#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
#define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
R600/SI: Initial local memory support Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186012
2013-07-11 00:37:07 +08:00
#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
#define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
#endif // SIDEFINES_H_