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llvm-project/llvm/test/CodeGen/Mips/divu.ll

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Div, Rem int/unsigned int llvm-svn: 165783
2012-10-12 10:01:09 +08:00
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
@iiii = global i32 100, align 4
@jjjj = global i32 4, align 4
@kkkk = common global i32 0, align 4
define void @test() nounwind {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @iiii, align 4
%1 = load i32, i32* @jjjj, align 4
Div, Rem int/unsigned int llvm-svn: 165783
2012-10-12 10:01:09 +08:00
%div = udiv i32 %0, %1
; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
; 16: mflo ${{[0-9]+}}
store i32 %div, i32* @kkkk, align 4
ret void
}