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llvm-project/llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll

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[AVR] Rewrite the function calling convention. Summary: The previous version relied on the standard calling convention using std::reverse() to try to force the AVR ABI. But this only works for simple cases, it fails for example with aggregate types. This patch rewrites the calling convention with custom C++ code, that implements the ABI defined in https://gcc.gnu.org/wiki/avr-gcc. To do that it adds a few 16-bit pseudo registers for unaligned argument passing, such as R24R23. For example this function: define void @fun({ i8, i16 } %a) will pass %a.0 in R22 and %a.1 in R24R23. There are no instructions that can use these pseudo registers, so a new register class, DREGSMOVW, is defined to make them apart. Also the ArgCC_AVR_BUILTIN_DIV is no longer necessary, as it is identical to the C++ behavior (actually the clobber list is more strict for __div* functions, but that is currently unimplemented). Reviewers: dylanmckay Subscribers: Gaelan, Sh4rK, indirect, jwagen, efriedma, dsprenkels, hiraditya, Jim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68524 Patch by Rodrigo Rivas Costa.
2020-06-19 19:26:00 +08:00
; RUN: llc < %s -march=avr | FileCheck %s
; CHECK-LABEL: ret_void_args_struct_i8_i32
define void @ret_void_args_struct_i8_i32({ i8, i32 } %a) {
start:
; CHECK: sts 4, r20
%0 = extractvalue { i8, i32 } %a, 0
store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
; CHECK-NEXT: sts 8, r24
; CHECK-NEXT: sts 7, r23
; CHECK-NEXT: sts 6, r22
; CHECK-NEXT: sts 5, r21
%1 = extractvalue { i8, i32 } %a, 1
store volatile i32 %1, i32* inttoptr (i64 5 to i32*)
ret void
}
; CHECK-LABEL: ret_void_args_struct_i8_i8_i8_i8
define void @ret_void_args_struct_i8_i8_i8_i8({ i8, i8, i8, i8 } %a) {
start:
; CHECK: sts 4, r22
%0 = extractvalue { i8, i8, i8, i8 } %a, 0
store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
; CHECK-NEXT: sts 5, r23
%1 = extractvalue { i8, i8, i8, i8 } %a, 1
store volatile i8 %1, i8* inttoptr (i64 5 to i8*)
; CHECK-NEXT: sts 6, r24
%2 = extractvalue { i8, i8, i8, i8 } %a, 2
store volatile i8 %2, i8* inttoptr (i64 6 to i8*)
; CHECK-NEXT: sts 7, r25
%3 = extractvalue { i8, i8, i8, i8 } %a, 3
store volatile i8 %3, i8* inttoptr (i64 7 to i8*)
ret void
}
; CHECK-LABEL: ret_void_args_struct_i32_16_i8
define void @ret_void_args_struct_i32_16_i8({ i32, i16, i8} %a) {
start:
; CHECK: sts 7, r21
; CHECK-NEXT: sts 6, r20
; CHECK-NEXT: sts 5, r19
; CHECK-NEXT: sts 4, r18
%0 = extractvalue { i32, i16, i8 } %a, 0
store volatile i32 %0, i32* inttoptr (i64 4 to i32*)
; CHECK-NEXT: sts 5, r23
; CHECK-NEXT: sts 4, r22
%1 = extractvalue { i32, i16, i8 } %a, 1
store volatile i16 %1, i16* inttoptr (i64 4 to i16*)
; CHECK-NEXT: sts 4, r24
%2 = extractvalue { i32, i16, i8 } %a, 2
store volatile i8 %2, i8* inttoptr (i64 4 to i8*)
ret void
}
; CHECK-LABEL: ret_void_args_struct_i8_i32_struct_i32_i8
define void @ret_void_args_struct_i8_i32_struct_i32_i8({ i8, i32 } %a, { i32, i8 } %b) {
start:
; CHECK: sts 4, r20
%0 = extractvalue { i8, i32 } %a, 0
store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
; CHECK-NEXT: sts 8, r24
; CHECK-NEXT: sts 7, r23
; CHECK-NEXT: sts 6, r22
; CHECK-NEXT: sts 5, r21
%1 = extractvalue { i8, i32 } %a, 1
store volatile i32 %1, i32* inttoptr (i64 5 to i32*)
; CHECK-NEXT: sts 9, r17
; CHECK-NEXT: sts 8, r16
; CHECK-NEXT: sts 7, r15
; CHECK-NEXT: sts 6, r14
%2 = extractvalue { i32, i8 } %b, 0
store volatile i32 %2, i32* inttoptr (i64 6 to i32*)
; CHECK-NEXT: sts 7, r18
%3 = extractvalue { i32, i8 } %b, 1
store volatile i8 %3, i8* inttoptr (i64 7 to i8*)
ret void
}