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llvm-project/llvm/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll

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AMDGPU: Enable code object v3 for AMDHSA only Differential Revision: https://reviews.llvm.org/D54186 llvm-svn: 346923
2018-11-15 10:32:43 +08:00
; RUN: llc -O0 -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -mattr=-code-object-v3,+promote-alloca < %s | FileCheck -check-prefix=NOOPTS -check-prefix=ALL %s
; RUN: llc -O1 -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -mattr=-code-object-v3,+promote-alloca < %s | FileCheck -check-prefix=OPTS -check-prefix=ALL %s
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
; ALL-LABEL: {{^}}promote_alloca_i32_array_array:
; NOOPTS: workgroup_group_segment_byte_size = 0{{$}}
[llvm] Fix missing FileCheck directive colons https://reviews.llvm.org/D77352
2020-04-03 06:28:32 +08:00
; NOOPTS-NOT: ds_write
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
; OPTS: ds_write
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @promote_alloca_i32_array_array(i32 addrspace(1)* %out, i32 %index) #0 {
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
entry:
[AMDGPU] Switch to the new addr space mapping by default This requires corresponding clang change. Differential Revision: https://reviews.llvm.org/D40955 llvm-svn: 324101
2018-02-03 00:07:16 +08:00
%alloca = alloca [2 x [2 x i32]], addrspace(5)
%gep0 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 0
%gep1 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 1
store i32 0, i32 addrspace(5)* %gep0
store i32 1, i32 addrspace(5)* %gep1
%gep2 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 %index
%load = load i32, i32 addrspace(5)* %gep2
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
store i32 %load, i32 addrspace(1)* %out
ret void
}
; ALL-LABEL: {{^}}optnone_promote_alloca_i32_array_array:
; ALL: workgroup_group_segment_byte_size = 0{{$}}
[llvm] Fix missing FileCheck directive colons https://reviews.llvm.org/D77352
2020-04-03 06:28:32 +08:00
; ALL-NOT: ds_write
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @optnone_promote_alloca_i32_array_array(i32 addrspace(1)* %out, i32 %index) #1 {
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
entry:
[AMDGPU] Switch to the new addr space mapping by default This requires corresponding clang change. Differential Revision: https://reviews.llvm.org/D40955 llvm-svn: 324101
2018-02-03 00:07:16 +08:00
%alloca = alloca [2 x [2 x i32]], addrspace(5)
%gep0 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 0
%gep1 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 1
store i32 0, i32 addrspace(5)* %gep0
store i32 1, i32 addrspace(5)* %gep1
%gep2 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]] addrspace(5)* %alloca, i32 0, i32 0, i32 %index
%load = load i32, i32 addrspace(5)* %gep2
AMDGPU: Skip promote alloca with no optimizations llvm-svn: 259551
2016-02-03 03:32:42 +08:00
store i32 %load, i32 addrspace(1)* %out
ret void
}
[AMDGPU] Wave and register controls - Implemented amdgpu-flat-work-group-size attribute - Implemented amdgpu-num-active-waves-per-eu attribute - Implemented amdgpu-num-sgpr attribute - Implemented amdgpu-num-vgpr attribute - Dynamic LDS constraints are in a separate patch Patch by Tom Stellard and Konstantin Zhuravlyov Differential Revision: https://reviews.llvm.org/D21562 llvm-svn: 280747
2016-09-07 04:22:28 +08:00
attributes #0 = { nounwind "amdgpu-flat-work-group-size"="64,64" }
attributes #1 = { nounwind optnone noinline "amdgpu-flat-work-group-size"="64,64" }