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llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir

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GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR. These are the operations that are trivially identical. Division is omitted for now because you need to use the correct sign/zero extension. llvm-svn: 277775
2016-08-05 05:39:49 +08:00
# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
define void @test_scalar_or_small() {
entry:
ret void
}
...
---
name: test_scalar_or_small
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
; CHECK-LABEL: name: test_scalar_or_small
GlobalISel: mark simple ops legal even on types < 32-bit. The 32-bit variants of these operations don't depend on the bits not being operated on, so they also naturally model operations narrower than the actual register width. llvm-svn: 279760
2016-08-26 01:37:39 +08:00
; CHECK: %2(8) = G_OR s8 %0, %1
GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR. These are the operations that are trivially identical. Division is omitted for now because you need to use the correct sign/zero extension. llvm-svn: 277775
2016-08-05 05:39:49 +08:00
GlobalISel: make truncate/extend casts uniform They really should have both types represented, but early variants were created before MachineInstrs could have multiple types so they're rather ambiguous. llvm-svn: 279567
2016-08-24 05:01:33 +08:00
%0(8) = G_TRUNC { s8, s64 } %x0
%1(8) = G_TRUNC { s8, s64 } %x1
GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR. These are the operations that are trivially identical. Division is omitted for now because you need to use the correct sign/zero extension. llvm-svn: 277775
2016-08-05 05:39:49 +08:00
%2(8) = G_OR s8 %0, %1
GlobalISel: make truncate/extend casts uniform They really should have both types represented, but early variants were created before MachineInstrs could have multiple types so they're rather ambiguous. llvm-svn: 279567
2016-08-24 05:01:33 +08:00
%x0 = G_ANYEXT { s64, s8 } %2
GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR. These are the operations that are trivially identical. Division is omitted for now because you need to use the correct sign/zero extension. llvm-svn: 277775
2016-08-05 05:39:49 +08:00
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