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llvm-project/llvm/test/CodeGen/X86/setcc.ll

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Propagate zest through logical shift. llvm-svn: 91378
2009-12-15 08:41:36 +08:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. llvm-svn: 91381
2009-12-15 08:53:42 +08:00
; rdar://7329206
; Use sbb x, x to materialize carry bit in a GPR. The value is either
; all 1's or all 0's.
Propagate zest through logical shift. llvm-svn: 91378
2009-12-15 08:41:36 +08:00
define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: t1:
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller. This fixes PR28146. The original commit tried inserting an 8bit-subreg into a GR32 (not GR32_ABCD) which was not appreciated by fast regalloc on 32-bit. llvm-svn: 274802
2016-07-08 06:50:23 +08:00
; CHECK: xorl %eax, %eax
Propagate zest through logical shift. llvm-svn: 91378
2009-12-15 08:41:36 +08:00
; CHECK: seta %al
; CHECK: shll $5, %eax
%0 = icmp ugt i16 %x, 26 ; <i1> [#uses=1]
%iftmp.1.0 = select i1 %0, i16 32, i16 0 ; <i16> [#uses=1]
ret i16 %iftmp.1.0
}
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. llvm-svn: 91381
2009-12-15 08:53:42 +08:00
define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: t2:
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. llvm-svn: 91381
2009-12-15 08:53:42 +08:00
; CHECK: sbbl %eax, %eax
; CHECK: andl $32, %eax
%0 = icmp ult i16 %x, 26 ; <i1> [#uses=1]
%iftmp.0.0 = select i1 %0, i16 32, i16 0 ; <i16> [#uses=1]
ret i16 %iftmp.0.0
}
define i64 @t3(i64 %x) nounwind readnone ssp {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: t3:
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. llvm-svn: 91381
2009-12-15 08:53:42 +08:00
; CHECK: sbbq %rax, %rax
[X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead. Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero. Fixes PR23100. llvm-svn: 234075
2015-04-04 10:08:20 +08:00
; CHECK: andl $64, %eax
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. llvm-svn: 91381
2009-12-15 08:53:42 +08:00
%0 = icmp ult i64 %x, 18 ; <i1> [#uses=1]
%iftmp.2.0 = select i1 %0, i64 64, i64 0 ; <i64> [#uses=1]
ret i64 %iftmp.2.0
}
[X86] Fix the (shl (and (setcc_c), c1), c2) -> (and setcc_c, (c1 << c2)) fold We didn't check for the necessary preconditions before folding a mask/shift into a single mask. This fixes PR24516. llvm-svn: 245544
2015-08-20 17:00:56 +08:00
@v4 = common global i32 0, align 4
define i32 @t4(i32 %a) {
entry:
; CHECK-LABEL: t4:
; CHECK: movq _v4@GOTPCREL(%rip), %rax
; CHECK: cmpl $1, (%rax)
; CHECK: sbbl %eax, %eax
; CHECK: andl $32768, %eax
; CHECK: leal 65536(%rax,%rax), %eax
%0 = load i32, i32* @v4, align 4
%not.tobool = icmp eq i32 %0, 0
%conv.i = sext i1 %not.tobool to i16
%call.lobit = lshr i16 %conv.i, 15
%add.i.1 = add nuw nsw i16 %call.lobit, 1
%conv4.2 = zext i16 %add.i.1 to i32
%add = shl nuw nsw i32 %conv4.2, 16
ret i32 %add
}
[X86] Use the right type when folding xor (truncate (shift)) -> setcc The result type of setcc is dependent on whether or not AVX512 is present. We had an X86-specific DAG-combine which assumed that the result type should be i8 when it could be i1. This meant that we would generate illegal setccs which LowerSETCC did not like. Instead, use an appropriate type and zero extend to i8. Also, there were some scenarios where the fold should have fired but didn't because we were overly cautious about the types. This meant that we generated: shrl $31, %edi andl $1, %edi kmovw %edi, %k0 kxnorw %k0, %k0, %k1 kshiftrw $15, %k1, %k1 kxorw %k1, %k0, %k0 kmovw %k0, %eax instead of: testl %edi, %edi setns %al This fixes PR27638. llvm-svn: 268609
2016-05-05 14:00:56 +08:00
define i8 @t5(i32 %a) #0 {
entry:
; CHECK-LABEL: t5:
; CHECK: testl %edi, %edi
; CHECK: setns %al
%.lobit = lshr i32 %a, 31
%trunc = trunc i32 %.lobit to i8
%.not = xor i8 %trunc, 1
ret i8 %.not
}
define zeroext i1 @t6(i32 %a) #0 {
entry:
; CHECK-LABEL: t6:
; CHECK: testl %edi, %edi
; CHECK: setns %al
%.lobit = lshr i32 %a, 31
%trunc = trunc i32 %.lobit to i1
%.not = xor i1 %trunc, 1
ret i1 %.not
}
attributes #0 = { "target-cpu"="skylake-avx512" }