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llvm-project/llvm/test/CodeGen/PowerPC/fast-isel-fpconv.ll

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Adding -verify-machineinstrs option to PowerPC tests Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
2016-08-04 02:17:35 +08:00
; RUN: llc -verify-machineinstrs -mtriple powerpc64-unknown-linux-gnu -fast-isel -O0 < %s | FileCheck %s
[PowerPC] Remove incorrect use of COPY_TO_REGCLASS in fast isel The fast isel pass currently emits a COPY_TO_REGCLASS node to convert from a F4RC to a F8RC register class during conversion of a floating-point number to integer. There is actually no support in the common code instruction printers to emit COPY_TO_REGCLASS nodes, so the PowerPC back-end has special code there to simply ignore COPY_TO_REGCLASS. This is correct *if and only if* the source and destination registers of COPY_TO_REGCLASS are the same (except for the different register class). But nothing guarantees this to be the case, and if the register allocator does end up allocating source and destination to different registers after all, the back-end simply generates incorrect code. I've included a test case that shows such incorrect code generation. However, it seems that COPY_TO_REGCLASS is actually not intended to be used at the MI layer at all. It is used during SelectionDAG, but always lowered to a plain COPY before emitting MI. Other back-end's fast isel passes never emit COPY_TO_REGCLASS at all. I suspect it is simply wrong for the PowerPC back-end to emit it here. This patch changes the PowerPC back-end to directly emit COPY instead of COPY_TO_REGCLASS and removes the special handling in the instruction printers. Differential Revision: http://reviews.llvm.org/D18605 llvm-svn: 265020
2016-03-31 22:44:50 +08:00
; The second fctiwz would use an incorrect input register due to wrong handling
; of COPY_TO_REGCLASS in the FastISel pass. Verify that this is fixed.
declare void @func(i32, i32)
define void @test() {
; CHECK-LABEL: test:
; CHECK: bl func
; CHECK-NEXT: nop
; CHECK: lfs [[REG:[0-9]+]],
; CHECK: fctiwz {{[0-9]+}}, [[REG]]
; CHECK: bl func
; CHECK-NEXT: nop
%memPos = alloca float, align 4
store float 1.500000e+01, float* %memPos
%valPos = load float, float* %memPos
%memNeg = alloca float, align 4
store float -1.500000e+01, float* %memNeg
%valNeg = load float, float* %memNeg
%FloatToIntPos = fptosi float %valPos to i32
call void @func(i32 15, i32 %FloatToIntPos)
%FloatToIntNeg = fptosi float %valNeg to i32
call void @func(i32 -15, i32 %FloatToIntNeg)
ret void
}