2017-07-26 07:51:02 +08:00
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//===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
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2016-02-17 03:26:02 +08:00
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2016-02-17 03:26:02 +08:00
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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///
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//===----------------------------------------------------------------------===//
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2017-02-02 06:56:06 +08:00
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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2016-02-17 03:26:02 +08:00
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2017-02-02 06:56:06 +08:00
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/IR/CallingConv.h"
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#include <cstdint>
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#include <functional>
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namespace llvm {
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class AArch64TargetLowering;
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class CCValAssign;
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class DataLayout;
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class MachineIRBuilder;
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class MachineRegisterInfo;
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class Type;
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2016-04-15 01:23:33 +08:00
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2016-02-17 03:26:02 +08:00
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class AArch64CallLowering: public CallLowering {
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public:
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AArch64CallLowering(const AArch64TargetLowering &TLI);
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2016-04-15 01:23:33 +08:00
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2018-08-02 16:33:31 +08:00
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bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
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2019-06-24 23:50:29 +08:00
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ArrayRef<Register> VRegs,
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Register SwiftErrorVReg) const override;
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2016-08-11 05:44:01 +08:00
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2016-09-21 20:57:35 +08:00
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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2019-06-27 16:54:17 +08:00
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ArrayRef<ArrayRef<Register>> VRegs) const override;
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2017-03-20 22:40:18 +08:00
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bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
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const MachineOperand &Callee, const ArgInfo &OrigRet,
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ArrayRef<ArgInfo> OrigArgs,
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Register SwiftErrorVReg) const override;
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bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
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const MachineOperand &Callee, const ArgInfo &OrigRet,
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ArrayRef<ArgInfo> OrigArgs) const override {
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return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs, 0);
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}
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bool supportSwiftError() const override { return true; }
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private:
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using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
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CCValAssign &)>;
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2016-09-22 21:49:25 +08:00
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2017-07-26 07:51:02 +08:00
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using MemHandler =
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std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
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2016-08-11 05:44:01 +08:00
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2016-09-21 20:57:45 +08:00
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void splitToValueTypes(const ArgInfo &OrigArgInfo,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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2016-09-20 23:20:36 +08:00
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const DataLayout &DL, MachineRegisterInfo &MRI,
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2019-06-27 17:24:30 +08:00
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CallingConv::ID CallConv) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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