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llvm-project/llvm/test/CodeGen/AArch64/logical-imm.ll

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Add explicit triples to AArch64 tests Only Linux is supported at the moment, and other platforms quickly fault. As a result these tests would fail on non-Linux hosts. It may be worth making the tests more generic again as more platforms are supported. llvm-svn: 174170
2013-02-01 19:40:47 +08:00
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Add AArch64 as an experimental target. This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174054
2013-01-31 20:12:40 +08:00
@var32 = global i32 0
@var64 = global i64 0
define void @test_and(i32 %in32, i64 %in64) {
; CHECK: test_and:
%val0 = and i32 %in32, 2863311530
store volatile i32 %val0, i32* @var32
; CHECK: and {{w[0-9]+}}, {{w[0-9]+}}, #0xaaaaaaaa
%val1 = and i32 %in32, 4293984240
store volatile i32 %val1, i32* @var32
; CHECK: and {{w[0-9]+}}, {{w[0-9]+}}, #0xfff0fff0
%val2 = and i64 %in64, 9331882296111890817
store volatile i64 %val2, i64* @var64
; CHECK: and {{x[0-9]+}}, {{x[0-9]+}}, #0x8181818181818181
%val3 = and i64 %in64, 18429855317404942275
store volatile i64 %val3, i64* @var64
; CHECK: and {{x[0-9]+}}, {{x[0-9]+}}, #0xffc3ffc3ffc3ffc3
ret void
}
define void @test_orr(i32 %in32, i64 %in64) {
; CHECK: test_orr:
%val0 = or i32 %in32, 2863311530
store volatile i32 %val0, i32* @var32
; CHECK: orr {{w[0-9]+}}, {{w[0-9]+}}, #0xaaaaaaaa
%val1 = or i32 %in32, 4293984240
store volatile i32 %val1, i32* @var32
; CHECK: orr {{w[0-9]+}}, {{w[0-9]+}}, #0xfff0fff0
%val2 = or i64 %in64, 9331882296111890817
store volatile i64 %val2, i64* @var64
; CHECK: orr {{x[0-9]+}}, {{x[0-9]+}}, #0x8181818181818181
%val3 = or i64 %in64, 18429855317404942275
store volatile i64 %val3, i64* @var64
; CHECK: orr {{x[0-9]+}}, {{x[0-9]+}}, #0xffc3ffc3ffc3ffc3
ret void
}
define void @test_eor(i32 %in32, i64 %in64) {
; CHECK: test_eor:
%val0 = xor i32 %in32, 2863311530
store volatile i32 %val0, i32* @var32
; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, #0xaaaaaaaa
%val1 = xor i32 %in32, 4293984240
store volatile i32 %val1, i32* @var32
; CHECK: eor {{w[0-9]+}}, {{w[0-9]+}}, #0xfff0fff0
%val2 = xor i64 %in64, 9331882296111890817
store volatile i64 %val2, i64* @var64
; CHECK: eor {{x[0-9]+}}, {{x[0-9]+}}, #0x8181818181818181
%val3 = xor i64 %in64, 18429855317404942275
store volatile i64 %val3, i64* @var64
; CHECK: eor {{x[0-9]+}}, {{x[0-9]+}}, #0xffc3ffc3ffc3ffc3
ret void
}
define void @test_mov(i32 %in32, i64 %in64) {
; CHECK: test_mov:
%val0 = add i32 %in32, 2863311530
store i32 %val0, i32* @var32
; CHECK: orr {{w[0-9]+}}, wzr, #0xaaaaaaaa
%val1 = add i64 %in64, 11068046444225730969
store i64 %val1, i64* @var64
; CHECK: orr {{x[0-9]+}}, xzr, #0x9999999999999999
ret void
; CHECK: ret
}