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llvm-project/llvm/test/CodeGen/Mips/mips64instrs.ll

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[mips] Transfer kill flag to the newly created operand. llvm-svn: 192662
2013-10-15 09:06:30 +08:00
; RUN: llc -march=mips64el -mcpu=mips64 -verify-machineinstrs < %s | FileCheck %s
@gll0 = common global i64 0, align 8
@gll1 = common global i64 0, align 8
Mips64 arithmetic and logical instructions with two source registers. llvm-svn: 140806
2011-09-30 04:37:56 +08:00
define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
entry:
; CHECK: daddu
%add = add nsw i64 %a1, %a0
ret i64 %add
}
define i64 @f1(i64 %a0, i64 %a1) nounwind readnone {
entry:
; CHECK: dsubu
%sub = sub nsw i64 %a0, %a1
ret i64 %sub
}
define i64 @f4(i64 %a0, i64 %a1) nounwind readnone {
entry:
; CHECK: and
%and = and i64 %a1, %a0
ret i64 %and
}
define i64 @f5(i64 %a0, i64 %a1) nounwind readnone {
entry:
; CHECK: or
%or = or i64 %a1, %a0
ret i64 %or
}
define i64 @f6(i64 %a0, i64 %a1) nounwind readnone {
entry:
; CHECK: xor
%xor = xor i64 %a1, %a0
ret i64 %xor
}
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
define i64 @f7(i64 %a0) nounwind readnone {
entry:
Check values of immediate operands. llvm-svn: 140860
2011-10-01 01:19:21 +08:00
; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, 20
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
%add = add nsw i64 %a0, 20
ret i64 %add
}
define i64 @f8(i64 %a0) nounwind readnone {
entry:
Check values of immediate operands. llvm-svn: 140860
2011-10-01 01:19:21 +08:00
; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, -20
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
%sub = add nsw i64 %a0, -20
ret i64 %sub
}
define i64 @f9(i64 %a0) nounwind readnone {
entry:
Check values of immediate operands. llvm-svn: 140860
2011-10-01 01:19:21 +08:00
; CHECK: andi ${{[0-9]+}}, ${{[0-9]+}}, 20
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
%and = and i64 %a0, 20
ret i64 %and
}
define i64 @f10(i64 %a0) nounwind readnone {
entry:
Check values of immediate operands. llvm-svn: 140860
2011-10-01 01:19:21 +08:00
; CHECK: ori ${{[0-9]+}}, ${{[0-9]+}}, 20
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
%or = or i64 %a0, 20
ret i64 %or
}
define i64 @f11(i64 %a0) nounwind readnone {
entry:
Check values of immediate operands. llvm-svn: 140860
2011-10-01 01:19:21 +08:00
; CHECK: xori ${{[0-9]+}}, ${{[0-9]+}}, 20
Mips64 arithmetic and logical instructions with one source register and immediate. llvm-svn: 140839
2011-09-30 10:08:54 +08:00
%xor = xor i64 %a0, 20
ret i64 %xor
}
Add support for 64-bit integer multiply instructions. llvm-svn: 141017
2011-10-04 04:01:11 +08:00
define i64 @f12(i64 %a, i64 %b) nounwind readnone {
entry:
; CHECK: mult
%mul = mul nsw i64 %b, %a
ret i64 %mul
}
define i64 @f13(i64 %a, i64 %b) nounwind readnone {
entry:
; CHECK: mult
%mul = mul i64 %b, %a
ret i64 %mul
}
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
define i64 @f14(i64 %a, i64 %b) nounwind readnone {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: f14:
[mips] Trap on integer division by zero. By default, a teq instruction is inserted after integer divide. No divide-by-zero checks are performed if option "-mnocheck-zero-division" is used. llvm-svn: 182306
2013-05-21 02:07:43 +08:00
; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
; CHECK: mflo
[mips] Transfer kill flag to the newly created operand. llvm-svn: 192662
2013-10-15 09:06:30 +08:00
%0 = load i64* @gll0, align 8
%1 = load i64* @gll1, align 8
%div = sdiv i64 %0, %1
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
ret i64 %div
}
[mips] Transfer kill flag to the newly created operand. llvm-svn: 192662
2013-10-15 09:06:30 +08:00
define i64 @f15() nounwind readnone {
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: f15:
[mips] Trap on integer division by zero. By default, a teq instruction is inserted after integer divide. No divide-by-zero checks are performed if option "-mnocheck-zero-division" is used. llvm-svn: 182306
2013-05-21 02:07:43 +08:00
; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
; CHECK: mflo
[mips] Transfer kill flag to the newly created operand. llvm-svn: 192662
2013-10-15 09:06:30 +08:00
%0 = load i64* @gll0, align 8
%1 = load i64* @gll1, align 8
%div = udiv i64 %0, %1
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
ret i64 %div
}
define i64 @f16(i64 %a, i64 %b) nounwind readnone {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: f16:
[mips] Trap on integer division by zero. By default, a teq instruction is inserted after integer divide. No divide-by-zero checks are performed if option "-mnocheck-zero-division" is used. llvm-svn: 182306
2013-05-21 02:07:43 +08:00
; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
; CHECK: mfhi
%rem = srem i64 %a, %b
ret i64 %rem
}
define i64 @f17(i64 %a, i64 %b) nounwind readnone {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: f17:
[mips] Trap on integer division by zero. By default, a teq instruction is inserted after integer divide. No divide-by-zero checks are performed if option "-mnocheck-zero-division" is used. llvm-svn: 182306
2013-05-21 02:07:43 +08:00
; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
Add support for 64-bit divide instructions. llvm-svn: 141024
2011-10-04 05:06:13 +08:00
; CHECK: mfhi
%rem = urem i64 %a, %b
ret i64 %rem
}
Manually upgrade the test suite to specify the flag to cttz and ctlz. I followed three heuristics for deciding whether to set 'true' or 'false': - Everything target independent got 'true' as that is the expected common output of the GCC builtins. - If the target arch only has one way of implementing this operation, set the flag in the way that exercises the most of codegen. For most architectures this is also the likely path from a GCC builtin, with 'true' being set. It will (eventually) require lowering away that difference, and then lowering to the architecture's operation. - Otherwise, set the flag differently dependending on which target operation should be tested. Let me know if anyone has any issue with this pattern or would like specific tests of another form. This should allow the x86 codegen to just iteratively improve as I teach the backend how to differentiate between the two forms, and everything else should remain exactly the same. llvm-svn: 146370
2011-12-12 19:59:10 +08:00
declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
Add support for 64-bit count leading ones and zeros instructions. llvm-svn: 141028
2011-10-04 05:16:50 +08:00
define i64 @f18(i64 %X) nounwind readnone {
entry:
Move CHECK after entry label. llvm-svn: 141030
2011-10-04 05:24:30 +08:00
; CHECK: dclz $2, $4
Manually upgrade the test suite to specify the flag to cttz and ctlz. I followed three heuristics for deciding whether to set 'true' or 'false': - Everything target independent got 'true' as that is the expected common output of the GCC builtins. - If the target arch only has one way of implementing this operation, set the flag in the way that exercises the most of codegen. For most architectures this is also the likely path from a GCC builtin, with 'true' being set. It will (eventually) require lowering away that difference, and then lowering to the architecture's operation. - Otherwise, set the flag differently dependending on which target operation should be tested. Let me know if anyone has any issue with this pattern or would like specific tests of another form. This should allow the x86 codegen to just iteratively improve as I teach the backend how to differentiate between the two forms, and everything else should remain exactly the same. llvm-svn: 146370
2011-12-12 19:59:10 +08:00
%tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
Add support for 64-bit count leading ones and zeros instructions. llvm-svn: 141028
2011-10-04 05:16:50 +08:00
ret i64 %tmp1
}
define i64 @f19(i64 %X) nounwind readnone {
entry:
Move CHECK after entry label. llvm-svn: 141030
2011-10-04 05:24:30 +08:00
; CHECK: dclo $2, $4
Add support for 64-bit count leading ones and zeros instructions. llvm-svn: 141028
2011-10-04 05:16:50 +08:00
%neg = xor i64 %X, -1
Manually upgrade the test suite to specify the flag to cttz and ctlz. I followed three heuristics for deciding whether to set 'true' or 'false': - Everything target independent got 'true' as that is the expected common output of the GCC builtins. - If the target arch only has one way of implementing this operation, set the flag in the way that exercises the most of codegen. For most architectures this is also the likely path from a GCC builtin, with 'true' being set. It will (eventually) require lowering away that difference, and then lowering to the architecture's operation. - Otherwise, set the flag differently dependending on which target operation should be tested. Let me know if anyone has any issue with this pattern or would like specific tests of another form. This should allow the x86 codegen to just iteratively improve as I teach the backend how to differentiate between the two forms, and everything else should remain exactly the same. llvm-svn: 146370
2011-12-12 19:59:10 +08:00
%tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
Add support for 64-bit count leading ones and zeros instructions. llvm-svn: 141028
2011-10-04 05:16:50 +08:00
ret i64 %tmp1
}
Add support for 64-bit logical NOR. llvm-svn: 141029
2011-10-04 05:23:18 +08:00
define i64 @f20(i64 %a, i64 %b) nounwind readnone {
entry:
; CHECK: nor
%or = or i64 %b, %a
%neg = xor i64 %or, -1
ret i64 %neg
}