llvm-project/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s

define i16 @test5(i16 %f12) nounwind {
; CHECK-LABEL: test5:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shrl $6, %edi
; CHECK-NEXT:    movsbl %dil, %eax
; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
; CHECK-NEXT:    retq
	%f11 = shl i16 %f12, 2		; <i16> [#uses=1]
	%tmp7.25 = ashr i16 %f11, 8		; <i16> [#uses=1]
	ret i16 %tmp7.25
}