forked from OSchip/llvm-project
380 lines
14 KiB
LLVM
380 lines
14 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefix=X32-NOF16C
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; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefix=X32-F16C
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=X64-NOF16C
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=f16c | FileCheck %s --check-prefix=X64-F16C
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@a = global half 0xH0000, align 2
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@b = global half 0xH0000, align 2
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@c = global half 0xH0000, align 2
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define float @half_to_float() strictfp {
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; X32-NOF16C-LABEL: half_to_float:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $12, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X32-NOF16C-NEXT: movzwl _a, %eax
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; X32-NOF16C-NEXT: movl %eax, (%esp)
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; X32-NOF16C-NEXT: calll ___extendhfsf2
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; X32-NOF16C-NEXT: addl $12, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: half_to_float:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $12, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 16
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; X32-F16C-NEXT: movzwl _a, %eax
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; X32-F16C-NEXT: movl %eax, (%esp)
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; X32-F16C-NEXT: calll ___extendhfsf2
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; X32-F16C-NEXT: addl $12, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: half_to_float:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: pushq %rax
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X64-NOF16C-NEXT: movzwl {{.*}}(%rip), %edi
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; X64-NOF16C-NEXT: callq ___extendhfsf2
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; X64-NOF16C-NEXT: popq %rax
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: half_to_float:
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; X64-F16C: ## %bb.0:
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; X64-F16C-NEXT: movzwl {{.*}}(%rip), %eax
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; X64-F16C-NEXT: vmovd %eax, %xmm0
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; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; X64-F16C-NEXT: retq
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%1 = load half, half* @a, align 2
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%2 = tail call float @llvm.experimental.constrained.fpext.f32.f16(half %1, metadata !"fpexcept.strict") #0
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ret float %2
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}
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define double @half_to_double() strictfp {
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; X32-NOF16C-LABEL: half_to_double:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $12, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X32-NOF16C-NEXT: movzwl _a, %eax
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; X32-NOF16C-NEXT: movl %eax, (%esp)
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; X32-NOF16C-NEXT: calll ___extendhfsf2
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; X32-NOF16C-NEXT: addl $12, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: half_to_double:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $12, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 16
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; X32-F16C-NEXT: movzwl _a, %eax
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; X32-F16C-NEXT: movl %eax, (%esp)
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; X32-F16C-NEXT: calll ___extendhfsf2
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; X32-F16C-NEXT: addl $12, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: half_to_double:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: pushq %rax
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X64-NOF16C-NEXT: movzwl {{.*}}(%rip), %edi
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; X64-NOF16C-NEXT: callq ___extendhfsf2
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; X64-NOF16C-NEXT: cvtss2sd %xmm0, %xmm0
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; X64-NOF16C-NEXT: popq %rax
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: half_to_double:
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; X64-F16C: ## %bb.0:
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; X64-F16C-NEXT: movzwl {{.*}}(%rip), %eax
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; X64-F16C-NEXT: vmovd %eax, %xmm0
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; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; X64-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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; X64-F16C-NEXT: retq
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%1 = load half, half* @a, align 2
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%2 = tail call double @llvm.experimental.constrained.fpext.f64.f16(half %1, metadata !"fpexcept.strict") #0
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ret double %2
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}
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define x86_fp80 @half_to_fp80() strictfp {
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; X32-NOF16C-LABEL: half_to_fp80:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $12, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X32-NOF16C-NEXT: movzwl _a, %eax
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; X32-NOF16C-NEXT: movl %eax, (%esp)
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; X32-NOF16C-NEXT: calll ___extendhfsf2
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; X32-NOF16C-NEXT: addl $12, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: half_to_fp80:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $12, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 16
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; X32-F16C-NEXT: movzwl _a, %eax
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; X32-F16C-NEXT: movl %eax, (%esp)
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; X32-F16C-NEXT: calll ___extendhfsf2
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; X32-F16C-NEXT: addl $12, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: half_to_fp80:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: pushq %rax
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X64-NOF16C-NEXT: movzwl {{.*}}(%rip), %edi
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; X64-NOF16C-NEXT: callq ___extendhfsf2
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; X64-NOF16C-NEXT: movss %xmm0, {{[0-9]+}}(%rsp)
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; X64-NOF16C-NEXT: flds {{[0-9]+}}(%rsp)
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; X64-NOF16C-NEXT: wait
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; X64-NOF16C-NEXT: popq %rax
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: half_to_fp80:
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; X64-F16C: ## %bb.0:
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; X64-F16C-NEXT: movzwl {{.*}}(%rip), %eax
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; X64-F16C-NEXT: vmovd %eax, %xmm0
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; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
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; X64-F16C-NEXT: vmovss %xmm0, -{{[0-9]+}}(%rsp)
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; X64-F16C-NEXT: flds -{{[0-9]+}}(%rsp)
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; X64-F16C-NEXT: wait
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; X64-F16C-NEXT: retq
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%1 = load half, half* @a, align 2
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%2 = tail call x86_fp80 @llvm.experimental.constrained.fpext.f80.f16(half %1, metadata !"fpexcept.strict") #0
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ret x86_fp80 %2
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}
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define void @float_to_half(float %0) strictfp {
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; X32-NOF16C-LABEL: float_to_half:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $12, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X32-NOF16C-NEXT: flds {{[0-9]+}}(%esp)
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; X32-NOF16C-NEXT: fstps (%esp)
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; X32-NOF16C-NEXT: wait
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; X32-NOF16C-NEXT: calll ___truncsfhf2
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; X32-NOF16C-NEXT: movw %ax, _a
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; X32-NOF16C-NEXT: addl $12, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: float_to_half:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $12, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 16
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; X32-F16C-NEXT: flds {{[0-9]+}}(%esp)
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; X32-F16C-NEXT: fstps (%esp)
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; X32-F16C-NEXT: wait
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; X32-F16C-NEXT: calll ___truncsfhf2
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; X32-F16C-NEXT: movw %ax, _a
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; X32-F16C-NEXT: addl $12, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: float_to_half:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: pushq %rax
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X64-NOF16C-NEXT: callq ___truncsfhf2
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; X64-NOF16C-NEXT: movw %ax, {{.*}}(%rip)
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; X64-NOF16C-NEXT: popq %rax
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: float_to_half:
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; X64-F16C: ## %bb.0:
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; X64-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X64-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
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; X64-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
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; X64-F16C-NEXT: vpextrw $0, %xmm0, {{.*}}(%rip)
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; X64-F16C-NEXT: retq
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%2 = tail call half @llvm.experimental.constrained.fptrunc.f16.f32(float %0, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
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store half %2, half* @a, align 2
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ret void
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}
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define void @double_to_half(double %0) strictfp {
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; X32-NOF16C-LABEL: double_to_half:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $12, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X32-NOF16C-NEXT: fldl {{[0-9]+}}(%esp)
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; X32-NOF16C-NEXT: fstpl (%esp)
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; X32-NOF16C-NEXT: wait
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; X32-NOF16C-NEXT: calll ___truncdfhf2
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; X32-NOF16C-NEXT: movw %ax, _a
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; X32-NOF16C-NEXT: addl $12, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: double_to_half:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $12, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 16
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; X32-F16C-NEXT: fldl {{[0-9]+}}(%esp)
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; X32-F16C-NEXT: fstpl (%esp)
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; X32-F16C-NEXT: wait
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; X32-F16C-NEXT: calll ___truncdfhf2
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; X32-F16C-NEXT: movw %ax, _a
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; X32-F16C-NEXT: addl $12, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: double_to_half:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: pushq %rax
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
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; X64-NOF16C-NEXT: callq ___truncdfhf2
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; X64-NOF16C-NEXT: movw %ax, {{.*}}(%rip)
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; X64-NOF16C-NEXT: popq %rax
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: double_to_half:
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; X64-F16C: ## %bb.0:
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; X64-F16C-NEXT: pushq %rax
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; X64-F16C-NEXT: .cfi_def_cfa_offset 16
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; X64-F16C-NEXT: callq ___truncdfhf2
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; X64-F16C-NEXT: movw %ax, {{.*}}(%rip)
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; X64-F16C-NEXT: popq %rax
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; X64-F16C-NEXT: retq
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%2 = tail call half @llvm.experimental.constrained.fptrunc.f16.f64(double %0, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
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store half %2, half* @a, align 2
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ret void
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}
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define void @fp80_to_half(x86_fp80 %0) strictfp {
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; X32-NOF16C-LABEL: fp80_to_half:
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; X32-NOF16C: ## %bb.0:
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; X32-NOF16C-NEXT: subl $28, %esp
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; X32-NOF16C-NEXT: .cfi_def_cfa_offset 32
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; X32-NOF16C-NEXT: fldt {{[0-9]+}}(%esp)
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; X32-NOF16C-NEXT: fstpt (%esp)
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; X32-NOF16C-NEXT: wait
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; X32-NOF16C-NEXT: calll ___truncxfhf2
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; X32-NOF16C-NEXT: movw %ax, _a
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; X32-NOF16C-NEXT: addl $28, %esp
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; X32-NOF16C-NEXT: retl
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;
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; X32-F16C-LABEL: fp80_to_half:
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; X32-F16C: ## %bb.0:
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; X32-F16C-NEXT: subl $28, %esp
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; X32-F16C-NEXT: .cfi_def_cfa_offset 32
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; X32-F16C-NEXT: fldt {{[0-9]+}}(%esp)
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; X32-F16C-NEXT: fstpt (%esp)
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; X32-F16C-NEXT: wait
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; X32-F16C-NEXT: calll ___truncxfhf2
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; X32-F16C-NEXT: movw %ax, _a
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; X32-F16C-NEXT: addl $28, %esp
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; X32-F16C-NEXT: retl
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;
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; X64-NOF16C-LABEL: fp80_to_half:
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; X64-NOF16C: ## %bb.0:
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; X64-NOF16C-NEXT: subq $24, %rsp
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; X64-NOF16C-NEXT: .cfi_def_cfa_offset 32
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; X64-NOF16C-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NOF16C-NEXT: fstpt (%rsp)
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; X64-NOF16C-NEXT: wait
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; X64-NOF16C-NEXT: callq ___truncxfhf2
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; X64-NOF16C-NEXT: movw %ax, {{.*}}(%rip)
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; X64-NOF16C-NEXT: addq $24, %rsp
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; X64-NOF16C-NEXT: retq
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;
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; X64-F16C-LABEL: fp80_to_half:
|
||
|
|
; X64-F16C: ## %bb.0:
|
||
|
|
; X64-F16C-NEXT: subq $24, %rsp
|
||
|
|
; X64-F16C-NEXT: .cfi_def_cfa_offset 32
|
||
|
|
; X64-F16C-NEXT: fldt {{[0-9]+}}(%rsp)
|
||
|
|
; X64-F16C-NEXT: fstpt (%rsp)
|
||
|
|
; X64-F16C-NEXT: wait
|
||
|
|
; X64-F16C-NEXT: callq ___truncxfhf2
|
||
|
|
; X64-F16C-NEXT: movw %ax, {{.*}}(%rip)
|
||
|
|
; X64-F16C-NEXT: addq $24, %rsp
|
||
|
|
; X64-F16C-NEXT: retq
|
||
|
|
%2 = tail call half @llvm.experimental.constrained.fptrunc.f16.f80(x86_fp80 %0, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
|
||
|
|
store half %2, half* @a, align 2
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @add() strictfp {
|
||
|
|
; X32-NOF16C-LABEL: add:
|
||
|
|
; X32-NOF16C: ## %bb.0:
|
||
|
|
; X32-NOF16C-NEXT: subl $12, %esp
|
||
|
|
; X32-NOF16C-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; X32-NOF16C-NEXT: movzwl _a, %eax
|
||
|
|
; X32-NOF16C-NEXT: movl %eax, (%esp)
|
||
|
|
; X32-NOF16C-NEXT: calll ___extendhfsf2
|
||
|
|
; X32-NOF16C-NEXT: fstps {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
|
||
|
|
; X32-NOF16C-NEXT: wait
|
||
|
|
; X32-NOF16C-NEXT: movzwl _b, %eax
|
||
|
|
; X32-NOF16C-NEXT: movl %eax, (%esp)
|
||
|
|
; X32-NOF16C-NEXT: calll ___extendhfsf2
|
||
|
|
; X32-NOF16C-NEXT: flds {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Reload
|
||
|
|
; X32-NOF16C-NEXT: faddp %st, %st(1)
|
||
|
|
; X32-NOF16C-NEXT: fstps (%esp)
|
||
|
|
; X32-NOF16C-NEXT: wait
|
||
|
|
; X32-NOF16C-NEXT: calll ___truncsfhf2
|
||
|
|
; X32-NOF16C-NEXT: movw %ax, _c
|
||
|
|
; X32-NOF16C-NEXT: addl $12, %esp
|
||
|
|
; X32-NOF16C-NEXT: retl
|
||
|
|
;
|
||
|
|
; X32-F16C-LABEL: add:
|
||
|
|
; X32-F16C: ## %bb.0:
|
||
|
|
; X32-F16C-NEXT: subl $12, %esp
|
||
|
|
; X32-F16C-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; X32-F16C-NEXT: movzwl _a, %eax
|
||
|
|
; X32-F16C-NEXT: movl %eax, (%esp)
|
||
|
|
; X32-F16C-NEXT: calll ___extendhfsf2
|
||
|
|
; X32-F16C-NEXT: fstps {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
|
||
|
|
; X32-F16C-NEXT: wait
|
||
|
|
; X32-F16C-NEXT: movzwl _b, %eax
|
||
|
|
; X32-F16C-NEXT: movl %eax, (%esp)
|
||
|
|
; X32-F16C-NEXT: calll ___extendhfsf2
|
||
|
|
; X32-F16C-NEXT: flds {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Reload
|
||
|
|
; X32-F16C-NEXT: faddp %st, %st(1)
|
||
|
|
; X32-F16C-NEXT: fstps (%esp)
|
||
|
|
; X32-F16C-NEXT: wait
|
||
|
|
; X32-F16C-NEXT: calll ___truncsfhf2
|
||
|
|
; X32-F16C-NEXT: movw %ax, _c
|
||
|
|
; X32-F16C-NEXT: addl $12, %esp
|
||
|
|
; X32-F16C-NEXT: retl
|
||
|
|
;
|
||
|
|
; X64-NOF16C-LABEL: add:
|
||
|
|
; X64-NOF16C: ## %bb.0:
|
||
|
|
; X64-NOF16C-NEXT: pushq %rax
|
||
|
|
; X64-NOF16C-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; X64-NOF16C-NEXT: movzwl {{.*}}(%rip), %edi
|
||
|
|
; X64-NOF16C-NEXT: callq ___extendhfsf2
|
||
|
|
; X64-NOF16C-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 4-byte Spill
|
||
|
|
; X64-NOF16C-NEXT: movzwl {{.*}}(%rip), %edi
|
||
|
|
; X64-NOF16C-NEXT: callq ___extendhfsf2
|
||
|
|
; X64-NOF16C-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 4-byte Folded Reload
|
||
|
|
; X64-NOF16C-NEXT: callq ___truncsfhf2
|
||
|
|
; X64-NOF16C-NEXT: movw %ax, {{.*}}(%rip)
|
||
|
|
; X64-NOF16C-NEXT: popq %rax
|
||
|
|
; X64-NOF16C-NEXT: retq
|
||
|
|
;
|
||
|
|
; X64-F16C-LABEL: add:
|
||
|
|
; X64-F16C: ## %bb.0:
|
||
|
|
; X64-F16C-NEXT: movzwl {{.*}}(%rip), %eax
|
||
|
|
; X64-F16C-NEXT: vmovd %eax, %xmm0
|
||
|
|
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
|
||
|
|
; X64-F16C-NEXT: movzwl {{.*}}(%rip), %eax
|
||
|
|
; X64-F16C-NEXT: vmovd %eax, %xmm1
|
||
|
|
; X64-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
|
||
|
|
; X64-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
|
||
|
|
; X64-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
|
||
|
|
; X64-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
|
||
|
|
; X64-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
|
||
|
|
; X64-F16C-NEXT: vpextrw $0, %xmm0, {{.*}}(%rip)
|
||
|
|
; X64-F16C-NEXT: retq
|
||
|
|
%1 = load half, half* @a, align 2
|
||
|
|
%2 = tail call float @llvm.experimental.constrained.fpext.f32.f16(half %1, metadata !"fpexcept.strict") #0
|
||
|
|
%3 = load half, half* @b, align 2
|
||
|
|
%4 = tail call float @llvm.experimental.constrained.fpext.f32.f16(half %3, metadata !"fpexcept.strict") #0
|
||
|
|
%5 = tail call float @llvm.experimental.constrained.fadd.f32(float %2, float %4, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
|
||
|
|
%6 = tail call half @llvm.experimental.constrained.fptrunc.f16.f32(float %5, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
|
||
|
|
store half %6, half* @c, align 2
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
declare float @llvm.experimental.constrained.fpext.f32.f16(half, metadata)
|
||
|
|
declare double @llvm.experimental.constrained.fpext.f64.f16(half, metadata)
|
||
|
|
declare x86_fp80 @llvm.experimental.constrained.fpext.f80.f16(half, metadata)
|
||
|
|
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
|
||
|
|
declare half @llvm.experimental.constrained.fptrunc.f16.f32(float, metadata, metadata)
|
||
|
|
declare half @llvm.experimental.constrained.fptrunc.f16.f64(double, metadata, metadata)
|
||
|
|
declare half @llvm.experimental.constrained.fptrunc.f16.f80(x86_fp80, metadata, metadata)
|
||
|
|
|
||
|
|
attributes #0 = { strictfp }
|
||
|
|
|