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llvm-project/llvm/test/CodeGen/NVPTX/weak-global.ll

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[NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage llvm-svn: 211941
2014-06-28 02:35:56 +08:00
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
; CHECK: .weak .global .align 4 .u32 g
@g = common addrspace(1) global i32 zeroinitializer
define i32 @func0() {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%val = load i32, i32 addrspace(1)* @g
[NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage llvm-svn: 211941
2014-06-28 02:35:56 +08:00
ret i32 %val
}