2017-07-11 18:39:01 +08:00
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; RUN: opt %loadPolly -polly-import-jscop \
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2015-09-05 18:32:56 +08:00
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; RUN: -analyze < %s | FileCheck %s
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2017-07-11 18:39:01 +08:00
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; RUN: opt %loadPolly -polly-import-jscop \
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2015-10-06 23:36:44 +08:00
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; RUN: -polly-codegen -S < %s \
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2015-09-05 18:32:56 +08:00
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; RUN: -polly-parallel \
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; RUN: | FileCheck %s -check-prefix=IR
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; void new_multidim_access(long n, long m, float A[][m]) {
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; for (long i = 0; i < n; i++)
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; for (long j = 0; j < 100; j++)
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; A[i][2 * j] += i + j;
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; }
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: [n, m] -> { Stmt_bb4[i0, i1] -> MemRef_A[i0, 2i1] };
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; CHECK: new: [n, m] -> { Stmt_bb4[i0, i1] -> MemRef_A[i0, 13 + i1] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: [n, m] -> { Stmt_bb4[i0, i1] -> MemRef_A[i0, 2i1] };
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; CHECK: new: [n, m] -> { Stmt_bb4[i0, i1] -> MemRef_A[i0, 43 + i1] };
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2016-05-12 23:12:43 +08:00
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; IR: %polly.access.mul.polly.subfunc.arg.A = mul nsw i64 %polly.indvar, %polly.subfunc.arg.m
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2016-06-12 03:17:15 +08:00
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; IR: %6 = add nsw i64 %polly.indvar5, 13
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; IR: %polly.access.add.polly.subfunc.arg.A = add nsw i64 %polly.access.mul.polly.subfunc.arg.A, %6
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2015-09-05 18:41:19 +08:00
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; IR: %polly.access.polly.subfunc.arg.A = getelementptr float, float* %polly.subfunc.arg.A, i64 %polly.access.add.polly.subfunc.arg.A
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; IR: %tmp10_p_scalar_ = load float, float* %polly.access.polly.subfunc.arg.A, align 4, !alias.scope !0, !noalias !2, !llvm.mem.parallel_loop_access !3
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2016-05-12 23:12:43 +08:00
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; IR: %polly.access.mul.polly.subfunc.arg.A8 = mul nsw i64 %polly.indvar, %polly.subfunc.arg.m
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2016-06-12 03:17:15 +08:00
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; IR: %7 = add nsw i64 %polly.indvar5, 43
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; IR: %polly.access.add.polly.subfunc.arg.A9 = add nsw i64 %polly.access.mul.polly.subfunc.arg.A8, %7
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2015-09-30 21:36:54 +08:00
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; IR: %polly.access.polly.subfunc.arg.A10 = getelementptr float, float* %polly.subfunc.arg.A, i64 %polly.access.add.polly.subfunc.arg.A9
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; IR: store float %p_tmp11, float* %polly.access.polly.subfunc.arg.A10, align 4, !alias.scope !0, !noalias !2, !llvm.mem.parallel_
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2015-09-05 18:32:56 +08:00
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @new_multidim_access(i64 %n, i64 %m, float* %A) {
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bb:
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br label %bb1
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bb1: ; preds = %bb15, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp16, %bb15 ]
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%tmp = icmp slt i64 %i.0, %n
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br i1 %tmp, label %bb2, label %bb17
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bb2: ; preds = %bb1
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br label %bb3
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bb3: ; preds = %bb12, %bb2
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%j.0 = phi i64 [ 0, %bb2 ], [ %tmp13, %bb12 ]
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%exitcond = icmp ne i64 %j.0, 100
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br i1 %exitcond, label %bb4, label %bb14
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bb4: ; preds = %bb3
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%tmp5 = add nsw i64 %i.0, %j.0
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%tmp6 = sitofp i64 %tmp5 to float
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%tmp7 = shl nsw i64 %j.0, 1
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%tmp8 = mul nsw i64 %i.0, %m
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%.sum = add i64 %tmp8, %tmp7
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%tmp9 = getelementptr inbounds float, float* %A, i64 %.sum
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%tmp10 = load float, float* %tmp9, align 4
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%tmp11 = fadd float %tmp10, %tmp6
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store float %tmp11, float* %tmp9, align 4
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br label %bb12
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bb12: ; preds = %bb4
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%tmp13 = add nsw i64 %j.0, 1
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br label %bb3
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bb14: ; preds = %bb3
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br label %bb15
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bb15: ; preds = %bb14
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%tmp16 = add nsw i64 %i.0, 1
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br label %bb1
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bb17: ; preds = %bb1
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ret void
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}
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