[ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
The following code pattern:
mov %rax, %rcx
test %rax, %rax
%rax = ....
je throw_npe
mov(%rcx), %r9
mov(%rax), %r10
gets transformed into the following incorrect code after implicit null check pass:
mov %rax, %rcx
%rax = ....
faulting_load_op("movl (%rax), %r10", throw_npe)
mov(%rcx), %r9
For implicit null check pass, if the register that is checked for null value (ie, the register used in the 'test' instruction) is written into before the condition jump, we should avoid doing the optimization.
Patch by Surya Kumari Jangala!
Differential Revision: https://reviews.llvm.org/D48627
Reviewed By: skatkov
llvm-svn: 336241
2018-07-04 16:01:26 +08:00
|
|
|
# RUN: llc -mtriple=x86_64 -run-pass=implicit-null-checks %s -o - | FileCheck %s
|
|
|
|
|
--- |
|
|
|
|
|
|
|
|
|
|
define i32 @reg-rewrite(i32* %x) {
|
|
|
|
|
entry:
|
|
|
|
|
br i1 undef, label %is_null, label %not_null, !make.implicit !0
|
|
|
|
|
|
|
|
|
|
is_null:
|
|
|
|
|
ret i32 42
|
|
|
|
|
|
|
|
|
|
not_null:
|
|
|
|
|
ret i32 100
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
!0 = !{}
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
---
|
|
|
|
|
# Check that the TEST instruction is replaced with
|
|
|
|
|
# FAULTING_OP only if there are no instructions
|
|
|
|
|
# between the TEST and conditional jump
|
|
|
|
|
# that clobber the register used in TEST.
|
|
|
|
|
name: reg-rewrite
|
|
|
|
|
|
|
|
|
|
alignment: 4
|
|
|
|
|
tracksRegLiveness: true
|
|
|
|
|
liveins:
|
|
|
|
|
- { reg: '$rdi' }
|
|
|
|
|
|
|
|
|
|
body: |
|
|
|
|
|
bb.0.entry:
|
|
|
|
|
liveins: $rdi
|
|
|
|
|
|
|
|
|
|
TEST64rr $rdi, $rdi, implicit-def $eflags
|
|
|
|
|
; CHECK-LABEL: bb.0.entry
|
|
|
|
|
; CHECK-NOT: FAULTING_OP
|
|
|
|
|
renamable $rdi = MOV64ri 5000
|
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-06 03:28:09 +08:00
|
|
|
JCC_1 %bb.2, 4, implicit $eflags
|
[ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
The following code pattern:
mov %rax, %rcx
test %rax, %rax
%rax = ....
je throw_npe
mov(%rcx), %r9
mov(%rax), %r10
gets transformed into the following incorrect code after implicit null check pass:
mov %rax, %rcx
%rax = ....
faulting_load_op("movl (%rax), %r10", throw_npe)
mov(%rcx), %r9
For implicit null check pass, if the register that is checked for null value (ie, the register used in the 'test' instruction) is written into before the condition jump, we should avoid doing the optimization.
Patch by Surya Kumari Jangala!
Differential Revision: https://reviews.llvm.org/D48627
Reviewed By: skatkov
llvm-svn: 336241
2018-07-04 16:01:26 +08:00
|
|
|
|
|
|
|
|
bb.1.not_null:
|
|
|
|
|
liveins: $rdi, $rsi
|
|
|
|
|
|
|
|
|
|
$rax = MOV64rm renamable $rdi, 1, $noreg, 4, $noreg
|
|
|
|
|
RETQ $eax
|
|
|
|
|
|
|
|
|
|
bb.2.is_null:
|
|
|
|
|
$eax = MOV32ri 200
|
|
|
|
|
RETQ $eax
|
|
|
|
|
...
|
