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llvm-project/llvm/test/CodeGen/Thumb2/thumb2-ldr_ext.ll

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ARM: yet another round of ARM test clean ups llvm-svn: 205586
2014-04-04 07:47:24 +08:00
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
A few more load instructions. llvm-svn: 74500
2009-06-30 10:15:48 +08:00
define i32 @test1(i8* %v.pntr.s0.u1) {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp.u = load i8, i8* %v.pntr.s0.u1
A few more load instructions. llvm-svn: 74500
2009-06-30 10:15:48 +08:00
%tmp1.s = zext i8 %tmp.u to i32
ret i32 %tmp1.s
}
define i32 @test2(i16* %v.pntr.s0.u1) {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp.u = load i16, i16* %v.pntr.s0.u1
A few more load instructions. llvm-svn: 74500
2009-06-30 10:15:48 +08:00
%tmp1.s = zext i16 %tmp.u to i32
ret i32 %tmp1.s
}
define i32 @test3(i8* %v.pntr.s1.u0) {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp.s = load i8, i8* %v.pntr.s1.u0
A few more load instructions. llvm-svn: 74500
2009-06-30 10:15:48 +08:00
%tmp1.s = sext i8 %tmp.s to i32
ret i32 %tmp1.s
}
define i32 @test4() {
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp.s = load i16, i16* null
A few more load instructions. llvm-svn: 74500
2009-06-30 10:15:48 +08:00
%tmp1.s = sext i16 %tmp.s to i32
ret i32 %tmp1.s
}
ARM: yet another round of ARM test clean ups llvm-svn: 205586
2014-04-04 07:47:24 +08:00
; CHECK: ldrb
; CHECK-NOT: ldrb
; CHECK: ldrh
; CHECK-NOT: ldrh
; CHECK: ldrsb
; CHECK-NOT: ldrsb
; CHECK: ldrsh
; CHECK-NOT: ldrsh