2016-11-17 05:58:04 +08:00
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; RUN: llc -mattr=sram,movw,addsubiw < %s -march=avr | FileCheck %s
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declare void @llvm.va_start(i8*)
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declare i16 @vsprintf(i8* nocapture, i8* nocapture, i8*)
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declare void @llvm.va_end(i8*)
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define i16 @varargs1(i8* nocapture %x, ...) {
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; CHECK-LABEL: varargs1:
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; CHECK: movw r20, r28
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2020-04-22 02:19:56 +08:00
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; CHECK: subi r20, 215
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2016-11-17 05:58:04 +08:00
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; CHECK: sbci r21, 255
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; CHECK: movw r24, r28
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; CHECK: adiw r24, 3
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2020-04-22 02:19:56 +08:00
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; CHECK: ldd r22, Y+39
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; CHECK: ldd r23, Y+40
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2016-11-17 05:58:04 +08:00
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; CHECK: call
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%buffer = alloca [32 x i8]
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%ap = alloca i8*
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%arraydecay = getelementptr inbounds [32 x i8], [32 x i8]* %buffer, i16 0, i16 0
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%1 = load i8*, i8** %ap
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%call = call i16 @vsprintf(i8* %arraydecay, i8* %x, i8* %1)
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call void @llvm.va_end(i8* %ap1)
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ret i16 0
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}
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define i16 @varargs2(i8* nocapture %x, ...) {
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; CHECK-LABEL: varargs2:
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2017-09-26 10:07:54 +08:00
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; CHECK: ldd r24, [[REG:X|Y|Z]]+{{[0-9]+}}
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; CHECK: ldd r25, [[REG]]+{{[0-9]+}}
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2016-11-17 05:58:04 +08:00
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%ap = alloca i8*
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%1 = va_arg i8** %ap, i16
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call void @llvm.va_end(i8* %ap1)
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ret i16 %1
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}
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declare void @var1223(i16, ...)
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define void @varargcall() {
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; CHECK-LABEL: varargcall:
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; CHECK: ldi [[REG1:r[0-9]+]], 189
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; CHECK: ldi [[REG2:r[0-9]+]], 205
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2020-04-21 20:17:21 +08:00
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; CHECK: std Z+3, [[REG1]]
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; CHECK: std Z+4, [[REG2]]
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2017-04-19 20:02:52 +08:00
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; CHECK: ldi [[REG1:r[0-9]+]], 191
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; CHECK: ldi [[REG2:r[0-9]+]], 223
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2020-04-21 20:17:21 +08:00
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; CHECK: std Z+5, [[REG1]]
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; CHECK: std Z+6, [[REG2]]
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2016-11-17 05:58:04 +08:00
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; CHECK: ldi [[REG1:r[0-9]+]], 205
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; CHECK: ldi [[REG2:r[0-9]+]], 171
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2020-04-21 20:17:21 +08:00
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; CHECK: std Z+1, [[REG1]]
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; CHECK: std Z+2, [[REG2]]
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2016-11-17 05:58:04 +08:00
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; CHECK: call
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; CHECK: adiw r30, 6
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tail call void (i16, ...) @var1223(i16 -21555, i16 -12867, i16 -8257)
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ret void
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}
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