2022-04-07 18:03:55 +08:00
|
|
|
// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -O1 -no-struct-path-tbaa -disable-llvm-passes %s -emit-llvm -o - | FileCheck %s
|
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|
|
// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -O1 -disable-llvm-passes %s -emit-llvm -o - | FileCheck %s -check-prefixes=PATH,OLD-PATH
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|
|
// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -O1 -new-struct-path-tbaa -disable-llvm-passes %s -emit-llvm -o - | FileCheck %s -check-prefixes=PATH,NEW-PATH
|
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|
|
// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -O0 -disable-llvm-passes %s -emit-llvm -o - | FileCheck %s -check-prefix=NO-TBAA
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|
// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -O1 -relaxed-aliasing -disable-llvm-passes %s -emit-llvm -o - | FileCheck %s -check-prefix=NO-TBAA
|
2013-04-05 08:05:09 +08:00
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|
|
// Test TBAA metadata generated by front-end.
|
2016-07-06 15:13:49 +08:00
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|
|
//
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|
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|
|
// NO-TBAA-NOT: !tbaa
|
2013-04-05 08:05:09 +08:00
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|
|
2013-04-06 03:06:10 +08:00
|
|
|
typedef unsigned char uint8_t;
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|
|
|
|
typedef unsigned short uint16_t;
|
|
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|
|
typedef unsigned int uint32_t;
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|
|
|
|
typedef unsigned long long uint64_t;
|
2013-04-05 08:05:09 +08:00
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
|
|
|
|
|
uint32_t f32;
|
|
|
|
|
uint16_t f16_2;
|
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|
|
uint32_t f32_2;
|
|
|
|
|
} StructA;
|
|
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
|
|
|
|
|
StructA a;
|
|
|
|
|
uint32_t f32;
|
|
|
|
|
} StructB;
|
|
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
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|
|
|
StructB b;
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|
|
|
|
uint32_t f32;
|
|
|
|
|
} StructC;
|
|
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
|
|
|
|
|
StructB b;
|
|
|
|
|
uint32_t f32;
|
|
|
|
|
uint8_t f8;
|
|
|
|
|
} StructD;
|
|
|
|
|
|
|
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
|
|
|
|
|
uint32_t f32;
|
|
|
|
|
} StructS;
|
|
|
|
|
typedef struct
|
|
|
|
|
{
|
|
|
|
|
uint16_t f16;
|
|
|
|
|
uint32_t f32;
|
|
|
|
|
} StructS2;
|
|
|
|
|
|
|
|
|
|
uint32_t g(uint32_t *s, StructA *A, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z1g
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z1g
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
*s = 1;
|
|
|
|
|
A->f32 = 4;
|
|
|
|
|
return *s;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g2(uint32_t *s, StructA *A, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g2
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16:!.*]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g2
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_A_f16:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
*s = 1;
|
|
|
|
|
A->f16 = 4;
|
|
|
|
|
return *s;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g3(StructA *A, StructB *B, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g3
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g3
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
B->a.f32 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g4(StructA *A, StructB *B, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g4
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g4
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_B_a_f16:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
B->a.f16 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g5(StructA *A, StructB *B, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g5
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g5
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
B->f32 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g6(StructA *A, StructB *B, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g6
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g6
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32_2:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
B->a.f32_2 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g7(StructA *A, StructS *S, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g7
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g7
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
S->f32 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g8(StructA *A, StructS *S, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g8
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g8
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S_f16:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
A->f32 = 1;
|
|
|
|
|
S->f16 = 4;
|
|
|
|
|
return A->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g9(StructS *S, StructS2 *S2, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z2g9
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z2g9
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S2_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
S->f32 = 1;
|
|
|
|
|
S2->f32 = 4;
|
|
|
|
|
return S->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g10(StructS *S, StructS2 *S2, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z3g10
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z3g10
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S2_f16:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
S->f32 = 1;
|
|
|
|
|
S2->f16 = 4;
|
|
|
|
|
return S->f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g11(StructC *C, StructD *D, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z3g11
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z3g11
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_C_b_a_f32:!.*]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_D_b_a_f32:!.*]]
|
2013-04-05 08:05:09 +08:00
|
|
|
C->b.a.f32 = 1;
|
|
|
|
|
D->b.a.f32 = 4;
|
|
|
|
|
return C->b.a.f32;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t g12(StructC *C, StructD *D, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z3g12
|
2013-07-14 14:18:38 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2013-04-05 08:05:09 +08:00
|
|
|
// TODO: differentiate the two accesses.
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z3g12
|
2013-04-12 07:02:56 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
|
2013-04-05 08:05:09 +08:00
|
|
|
StructB *b1 = &(C->b);
|
|
|
|
|
StructB *b2 = &(D->b);
|
|
|
|
|
// b1, b2 have different context.
|
|
|
|
|
b1->a.f32 = 1;
|
|
|
|
|
b2->a.f32 = 4;
|
|
|
|
|
return b1->a.f32;
|
|
|
|
|
}
|
|
|
|
|
|
2013-04-23 03:50:07 +08:00
|
|
|
// Make sure that zero-length bitfield works.
|
|
|
|
|
#define ATTR __attribute__ ((ms_struct))
|
|
|
|
|
struct five {
|
|
|
|
|
char a;
|
|
|
|
|
int :0; /* ignored; prior field is not a bitfield. */
|
|
|
|
|
char b;
|
|
|
|
|
char c;
|
|
|
|
|
} ATTR;
|
|
|
|
|
char g13(struct five *a, struct five *b) {
|
|
|
|
|
return a->b;
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} signext i8 @_Z3g13
|
2015-02-28 05:19:58 +08:00
|
|
|
// CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char:!.*]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} signext i8 @_Z3g13
|
2015-02-28 05:19:58 +08:00
|
|
|
// PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_five_b:!.*]]
|
2013-04-23 03:50:07 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct six {
|
|
|
|
|
char a;
|
|
|
|
|
int :0;
|
|
|
|
|
char b;
|
|
|
|
|
char c;
|
|
|
|
|
};
|
|
|
|
|
char g14(struct six *a, struct six *b) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} signext i8 @_Z3g14
|
2015-02-28 05:19:58 +08:00
|
|
|
// CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} signext i8 @_Z3g14
|
2015-02-28 05:19:58 +08:00
|
|
|
// PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_six_b:!.*]]
|
2013-04-23 03:50:07 +08:00
|
|
|
return a->b;
|
|
|
|
|
}
|
|
|
|
|
|
2013-08-22 05:00:10 +08:00
|
|
|
// Types that differ only by name may alias.
|
|
|
|
|
typedef StructS StructS3;
|
|
|
|
|
uint32_t g15(StructS *S, StructS3 *S3, uint64_t count) {
|
2020-12-31 12:45:56 +08:00
|
|
|
// CHECK-LABEL: define{{.*}} i32 @_Z3g15
|
2013-08-22 05:00:10 +08:00
|
|
|
// CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
|
|
|
|
// CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
|
2020-12-31 12:45:56 +08:00
|
|
|
// PATH-LABEL: define{{.*}} i32 @_Z3g15
|
2013-08-22 05:00:10 +08:00
|
|
|
// PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
|
|
|
|
|
// PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
|
|
|
|
|
S->f32 = 1;
|
|
|
|
|
S3->f32 = 4;
|
|
|
|
|
return S->f32;
|
|
|
|
|
}
|
|
|
|
|
|
2014-12-16 03:10:08 +08:00
|
|
|
// CHECK: [[TYPE_char:!.*]] = !{!"omnipotent char", [[TAG_cxx_tbaa:!.*]],
|
2016-02-12 03:19:18 +08:00
|
|
|
// CHECK: [[TAG_cxx_tbaa]] = !{!"Simple C++ TBAA"}
|
2014-12-16 03:10:08 +08:00
|
|
|
// CHECK: [[TAG_i32]] = !{[[TYPE_i32:!.*]], [[TYPE_i32]], i64 0}
|
|
|
|
|
// CHECK: [[TYPE_i32]] = !{!"int", [[TYPE_char]],
|
|
|
|
|
// CHECK: [[TAG_i16]] = !{[[TYPE_i16:!.*]], [[TYPE_i16]], i64 0}
|
|
|
|
|
// CHECK: [[TYPE_i16]] = !{!"short", [[TYPE_char]],
|
|
|
|
|
// CHECK: [[TAG_char]] = !{[[TYPE_char]], [[TYPE_char]], i64 0}
|
2013-04-05 08:05:09 +08:00
|
|
|
|
2017-12-22 17:54:23 +08:00
|
|
|
// OLD-PATH: [[TYPE_CHAR:!.*]] = !{!"omnipotent char", !
|
|
|
|
|
// OLD-PATH: [[TAG_i32]] = !{[[TYPE_INT:!.*]], [[TYPE_INT]], i64 0}
|
|
|
|
|
// OLD-PATH: [[TYPE_INT]] = !{!"int", [[TYPE_CHAR]]
|
|
|
|
|
// OLD-PATH: [[TAG_A_f32]] = !{[[TYPE_A:!.*]], [[TYPE_INT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TYPE_A]] = !{!"_ZTS7StructA", [[TYPE_SHORT:!.*]], i64 0, [[TYPE_INT]], i64 4, [[TYPE_SHORT]], i64 8, [[TYPE_INT]], i64 12}
|
|
|
|
|
// OLD-PATH: [[TYPE_SHORT:!.*]] = !{!"short", [[TYPE_CHAR]]
|
|
|
|
|
// OLD-PATH: [[TAG_A_f16]] = !{[[TYPE_A]], [[TYPE_SHORT]], i64 0}
|
|
|
|
|
// OLD-PATH: [[TAG_B_a_f32]] = !{[[TYPE_B:!.*]], [[TYPE_INT]], i64 8}
|
|
|
|
|
// OLD-PATH: [[TYPE_B]] = !{!"_ZTS7StructB", [[TYPE_SHORT]], i64 0, [[TYPE_A]], i64 4, [[TYPE_INT]], i64 20}
|
|
|
|
|
// OLD-PATH: [[TAG_B_a_f16]] = !{[[TYPE_B]], [[TYPE_SHORT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TAG_B_f32]] = !{[[TYPE_B]], [[TYPE_INT]], i64 20}
|
|
|
|
|
// OLD-PATH: [[TAG_B_a_f32_2]] = !{[[TYPE_B]], [[TYPE_INT]], i64 16}
|
|
|
|
|
// OLD-PATH: [[TAG_S_f32]] = !{[[TYPE_S:!.*]], [[TYPE_INT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TYPE_S]] = !{!"_ZTS7StructS", [[TYPE_SHORT]], i64 0, [[TYPE_INT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TAG_S_f16]] = !{[[TYPE_S]], [[TYPE_SHORT]], i64 0}
|
|
|
|
|
// OLD-PATH: [[TAG_S2_f32]] = !{[[TYPE_S2:!.*]], [[TYPE_INT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TYPE_S2]] = !{!"_ZTS8StructS2", [[TYPE_SHORT]], i64 0, [[TYPE_INT]], i64 4}
|
|
|
|
|
// OLD-PATH: [[TAG_S2_f16]] = !{[[TYPE_S2]], [[TYPE_SHORT]], i64 0}
|
|
|
|
|
// OLD-PATH: [[TAG_C_b_a_f32]] = !{[[TYPE_C:!.*]], [[TYPE_INT]], i64 12}
|
|
|
|
|
// OLD-PATH: [[TYPE_C]] = !{!"_ZTS7StructC", [[TYPE_SHORT]], i64 0, [[TYPE_B]], i64 4, [[TYPE_INT]], i64 28}
|
|
|
|
|
// OLD-PATH: [[TAG_D_b_a_f32]] = !{[[TYPE_D:!.*]], [[TYPE_INT]], i64 12}
|
|
|
|
|
// OLD-PATH: [[TYPE_D]] = !{!"_ZTS7StructD", [[TYPE_SHORT]], i64 0, [[TYPE_B]], i64 4, [[TYPE_INT]], i64 28, [[TYPE_CHAR]], i64 32}
|
|
|
|
|
// OLD-PATH: [[TAG_five_b]] = !{[[TYPE_five:!.*]], [[TYPE_CHAR]], i64 1}
|
2019-06-23 05:30:43 +08:00
|
|
|
// OLD-PATH: [[TYPE_five]] = !{!"_ZTS4five", [[TYPE_CHAR]], i64 0, [[TYPE_CHAR]], i64 1, [[TYPE_CHAR]], i64 2}
|
2017-12-22 17:54:23 +08:00
|
|
|
// OLD-PATH: [[TAG_six_b]] = !{[[TYPE_six:!.*]], [[TYPE_CHAR]], i64 4}
|
2019-06-23 05:30:43 +08:00
|
|
|
// OLD-PATH: [[TYPE_six]] = !{!"_ZTS3six", [[TYPE_CHAR]], i64 0, [[TYPE_CHAR]], i64 4, [[TYPE_CHAR]], i64 5}
|
2017-12-22 17:54:23 +08:00
|
|
|
|
|
|
|
|
// NEW-PATH-DAG: [[ROOT:!.*]] = !{!"Simple C++ TBAA"}
|
|
|
|
|
// NEW-PATH-DAG: [[TYPE_char:!.*]] = !{[[ROOT]], i64 1, !"omnipotent char"}
|
|
|
|
|
// NEW-PATH-DAG: [[TYPE_short:!.*]] = !{[[TYPE_char]], i64 2, !"short"}
|
|
|
|
|
// NEW-PATH-DAG: [[TYPE_int:!.*]] = !{[[TYPE_char]], i64 4, !"int"}
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// NEW-PATH-DAG: [[TAG_i32:!.*]] = !{[[TYPE_int]], [[TYPE_int]], i64 0, i64 4}
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2022-03-26 02:12:39 +08:00
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// NEW-PATH-DAG: [[TYPE_A:!.*]] = !{[[TYPE_char]], i64 16, !"_ZTS7StructA", [[TYPE_short]], i64 0, i64 2, [[TYPE_int]], i64 4, i64 4, [[TYPE_short]], i64 8, i64 2, [[TYPE_int]], i64 12, i64 4}
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2017-12-22 17:54:23 +08:00
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// NEW-PATH-DAG: [[TAG_A_f16]] = !{[[TYPE_A]], [[TYPE_short]], i64 0, i64 2}
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// NEW-PATH-DAG: [[TAG_A_f32]] = !{[[TYPE_A]], [[TYPE_int]], i64 4, i64 4}
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// NEW-PATH-DAG: [[TYPE_B:!.*]] = !{[[TYPE_char]], i64 24, !"_ZTS7StructB", [[TYPE_short]], i64 0, i64 2, [[TYPE_A]], i64 4, i64 16, [[TYPE_int]], i64 20, i64 4}
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// NEW-PATH-DAG: [[TAG_B_a_f16]] = !{[[TYPE_B]], [[TYPE_short]], i64 4, i64 2}
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// NEW-PATH-DAG: [[TAG_B_a_f32]] = !{[[TYPE_B]], [[TYPE_int]], i64 8, i64 4}
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// NEW-PATH-DAG: [[TAG_B_f32]] = !{[[TYPE_B]], [[TYPE_int]], i64 20, i64 4}
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// NEW-PATH-DAG: [[TAG_B_a_f32_2]] = !{[[TYPE_B]], [[TYPE_int]], i64 16, i64 4}
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// NEW-PATH-DAG: [[TYPE_S:!.*]] = !{[[TYPE_char]], i64 8, !"_ZTS7StructS", [[TYPE_short]], i64 0, i64 2, [[TYPE_int]], i64 4, i64 4}
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// NEW-PATH-DAG: [[TAG_S_f16]] = !{[[TYPE_S]], [[TYPE_short]], i64 0, i64 2}
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// NEW-PATH-DAG: [[TAG_S_f32]] = !{[[TYPE_S]], [[TYPE_int]], i64 4, i64 4}
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// NEW-PATH-DAG: [[TYPE_S2:!.*]] = !{[[TYPE_char]], i64 8, !"_ZTS8StructS2", [[TYPE_short]], i64 0, i64 2, [[TYPE_int]], i64 4, i64 4}
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// NEW-PATH-DAG: [[TAG_S2_f16]] = !{[[TYPE_S2]], [[TYPE_short]], i64 0, i64 2}
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// NEW-PATH-DAG: [[TAG_S2_f32]] = !{[[TYPE_S2]], [[TYPE_int]], i64 4, i64 4}
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// NEW-PATH-DAG: [[TYPE_C:!.*]] = !{[[TYPE_char]], i64 32, !"_ZTS7StructC", [[TYPE_short]], i64 0, i64 2, [[TYPE_B]], i64 4, i64 24, [[TYPE_int]], i64 28, i64 4}
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// NEW-PATH-DAG: [[TAG_C_b_a_f32]] = !{[[TYPE_C]], [[TYPE_int]], i64 12, i64 4}
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// NEW-PATH-DAG: [[TYPE_D:!.*]] = !{[[TYPE_char]], i64 36, !"_ZTS7StructD", [[TYPE_short]], i64 0, i64 2, [[TYPE_B]], i64 4, i64 24, [[TYPE_int]], i64 28, i64 4, [[TYPE_char]], i64 32, i64 1}
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// NEW-PATH-DAG: [[TAG_D_b_a_f32]] = !{[[TYPE_D]], [[TYPE_int]], i64 12, i64 4}
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2019-06-23 05:30:43 +08:00
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// NEW-PATH-DAG: [[TYPE_five:!.*]] = !{[[TYPE_char]], i64 3, !"_ZTS4five", [[TYPE_char]], i64 0, i64 1, [[TYPE_char]], i64 1, i64 1, [[TYPE_char]], i64 2, i64 1}
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2017-12-22 17:54:23 +08:00
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// NEW-PATH-DAG: [[TAG_five_b]] = !{[[TYPE_five]], [[TYPE_char]], i64 1, i64 1}
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2019-06-23 05:30:43 +08:00
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// NEW-PATH-DAG: [[TYPE_six:!.*]] = !{[[TYPE_char]], i64 6, !"_ZTS3six", [[TYPE_char]], i64 0, i64 1, [[TYPE_char]], i64 4, i64 1, [[TYPE_char]], i64 5, i64 1}
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2017-12-22 17:54:23 +08:00
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// NEW-PATH-DAG: [[TAG_six_b]] = !{[[TYPE_six]], [[TYPE_char]], i64 4, i64 1}
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