forked from OSchip/llvm-project
16 lines
621 B
LLVM
16 lines
621 B
LLVM
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; RUN: llc -march=hexagon -enable-aa-sched-mi < %s
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; REQUIRES: asserts
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; Make sure the base is a register and not an address.
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define fastcc void @Get_lsp_pol(i32* nocapture %f) #0 {
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entry:
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%f5 = alloca i32, align 4
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%arrayidx103 = getelementptr inbounds i32, i32* %f, i32 4
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store i32 0, i32* %arrayidx103, align 4
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%f5.0.load185 = load volatile i32, i32* %f5, align 4
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ret void
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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