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llvm-project/llvm/lib/Target/R600/SIDefines.h

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R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
/// \file
//===----------------------------------------------------------------------===//
Canonicalize header guards into a common format. Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
2014-08-14 00:26:38 +08:00
#ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H
#define LLVM_LIB_TARGET_R600_SIDEFINES_H
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions The previous code declared the operand as unknown:$vaddr, which made it possible for scalar registers to be used instead of vector registers. llvm-svn: 188425
2013-08-15 07:24:17 +08:00
namespace SIInstrFlags {
R600/SI: Add isMUBUF / isMTBUF Also add missing comments about how the flags work. llvm-svn: 214195
2014-07-30 02:51:56 +08:00
// This needs to be kept in sync with the field bits in InstSI.
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions The previous code declared the operand as unknown:$vaddr, which made it possible for scalar registers to be used instead of vector registers. llvm-svn: 188425
2013-08-15 07:24:17 +08:00
enum {
R600/SI: Fix broken encoding of DS_WRITE_B32 The logic in SIInsertWaits::getHwCounts() only really made sense for SMRD instructions, and trying to shoehorn it into handling DS_WRITE_B32 caused it to corrupt the encoding of that by clobbering the first operand with the second one. Undo that damage and only apply the SMRD logic to that. Fixes some derivates related piglit regressions with radeonsi. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 188558
2013-08-17 00:19:24 +08:00
MIMG = 1 << 3,
R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP* The function is used by the machine verifier and checks that VOP* instructions have legal operands. llvm-svn: 192367
2013-10-11 01:11:55 +08:00
SMRD = 1 << 4,
VOP1 = 1 << 5,
VOP2 = 1 << 6,
VOP3 = 1 << 7,
R600/SI: Prefer SALU instructions for bit shift operations All shift operations will be selected as SALU instructions and then if necessary lowered to VALU instructions in the SIFixSGPRCopies pass. This allows us to do more operations on the SALU which will improve performance and is also required for implementing private memory using indirect addressing, since the private memory pointers must stay in the scalar registers. This patch includes some fixes from Matt Arsenault. llvm-svn: 194625
2013-11-14 07:36:37 +08:00
VOPC = 1 << 8,
R600/SI: Add isMUBUF / isMTBUF Also add missing comments about how the flags work. llvm-svn: 214195
2014-07-30 02:51:56 +08:00
SALU = 1 << 9,
MUBUF = 1 << 10,
MTBUF = 1 << 11
R600/SI: Assign a register class to the $vaddr operand for MIMG instructions The previous code declared the operand as unknown:$vaddr, which made it possible for scalar registers to be used instead of vector registers. llvm-svn: 188425
2013-08-15 07:24:17 +08:00
};
}
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
R600/SI: Initial local memory support Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186012
2013-07-11 00:37:07 +08:00
#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
#define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
R600/SI: Initial local memory support Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186012
2013-07-11 00:37:07 +08:00
#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
R600/SI: Use scratch memory for large private arrays llvm-svn: 213551
2014-07-21 23:45:01 +08:00
#define S_00B02C_SCRATCH_EN(x) (((x) & 0x1) << 0)
R600/SI: Initial local memory support Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186012
2013-07-11 00:37:07 +08:00
#define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
R600/SI: Emit config values in register value pairs. Instead of emitting config values in a predefined order, the code emitter will now emit a 32-bit register index followed by the 32-bit config value. llvm-svn: 179546
2013-04-16 01:51:35 +08:00
#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
R600/SI: Add FP mode bits to binary. The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. llvm-svn: 211791
2014-06-27 01:22:30 +08:00
#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
#define S_00B848_VGPRS(x) (((x) & 0x3F) << 0)
#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F)
#define C_00B848_VGPRS 0xFFFFFFC0
#define S_00B848_SGPRS(x) (((x) & 0x0F) << 6)
#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F)
#define C_00B848_SGPRS 0xFFFFFC3F
#define S_00B848_PRIORITY(x) (((x) & 0x03) << 10)
#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03)
#define C_00B848_PRIORITY 0xFFFFF3FF
#define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12)
#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
#define C_00B848_FLOAT_MODE 0xFFF00FFF
#define S_00B848_PRIV(x) (((x) & 0x1) << 20)
#define G_00B848_PRIV(x) (((x) >> 20) & 0x1)
#define C_00B848_PRIV 0xFFEFFFFF
#define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21)
#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1)
#define C_00B848_DX10_CLAMP 0xFFDFFFFF
#define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22)
#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1)
#define C_00B848_DEBUG_MODE 0xFFBFFFFF
#define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23)
#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1)
#define C_00B848_IEEE_MODE 0xFF7FFFFF
// Helpers for setting FLOAT_MODE
#define FP_ROUND_ROUND_TO_NEAREST 0
#define FP_ROUND_ROUND_TO_INF 1
#define FP_ROUND_ROUND_TO_NEGINF 2
#define FP_ROUND_ROUND_TO_ZERO 3
// Bits 3:0 control rounding mode. 1:0 control single precision, 3:2 double
// precision.
#define FP_ROUND_MODE_SP(x) ((x) & 0x3)
#define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2)
#define FP_DENORM_FLUSH_IN_FLUSH_OUT 0
#define FP_DENORM_FLUSH_OUT 1
#define FP_DENORM_FLUSH_IN 2
#define FP_DENORM_FLUSH_NONE 3
// Bits 7:4 control denormal handling. 5:4 control single precision, 6:7 double
// precision.
#define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4)
#define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6)
R600/SI: Use scratch memory for large private arrays llvm-svn: 213551
2014-07-21 23:45:01 +08:00
#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860
#define S_00B860_WAVESIZE(x) (((x) & 0x1FFF) << 12)
Canonicalize header guards into a common format. Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
2014-08-14 00:26:38 +08:00
#endif