2018-11-02 09:31:52 +08:00
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|
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# RUN: llc -o - %s -start-after=patchable-function -filetype=obj -O0 -mtriple=i386-unknown-linux-gnu -dwarf-version=4 | llvm-dwarfdump -v - | FileCheck %s
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# From the code:
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|
#
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# debug-loc-offset1.cc
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# int bar (int b) {
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# return b+4;
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# }
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#
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# debug-loc-offset2.cc
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# struct A {
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# int var;
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# virtual char foo();
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# };
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#
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# void baz(struct A a) {
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# int z = 2;
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# if (a.var > 2)
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# z++;
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# if (a.foo() == 'a')
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# z++;
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|
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# }
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#
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# Compiled separately for i386-pc-linux-gnu and linked together.
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# This ensures that we have multiple compile units and multiple location lists
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# so that we can verify that
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# debug_loc entries are relative to the low_pc of the CU. The loc entry for
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# the byval argument in foo.cpp is in the second CU and so should have
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# an offset relative to that CU rather than from the beginning of the text
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# section.
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#
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# Checking that we have two compile units with two sets of high/lo_pc.
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# CHECK: .debug_info contents
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# CHECK: DW_TAG_compile_unit
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2020-10-05 06:42:03 +08:00
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# CHECK: DW_AT_low_pc {{.*}} (0x00000020 ".text")
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2018-11-02 09:31:52 +08:00
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# CHECK: DW_AT_high_pc
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#
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# CHECK: DW_TAG_subprogram
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# CHECK-NOT: DW_TAG
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# CHECK: DW_AT_linkage_name [DW_FORM_strp]{{.*}}"_Z3baz1A"
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# CHECK-NOT: {{DW_TAG|NULL}}
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# CHECK: DW_TAG_formal_parameter
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# CHECK-NOT: DW_TAG
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# CHECK: DW_AT_location [DW_FORM_sec_offset] ({{.*}}
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Re-commit "DWARF location lists: Add section index dumping"
This reapplies c0f6ad7d1f3ccb9d0b9ce9ef8dfa06409ccf1b3e with an
additional fix in test/DebugInfo/X86/constant-loclist.ll, which had a
slightly different output on windows targets. The test now accounts for
this difference.
The original commit message follows.
Summary:
As discussed in D70081, this adds the ability to dump section
names/indices to the location list dumper. It does this by moving the
range specific logic from DWARFDie.cpp:dumpRanges into the
DWARFAddressRange class.
The trickiest part of this patch is the backflip in the meanings of the
two dump flags for the location list sections.
The dumping of "raw" location list data is now controlled by
"DisplayRawContents" flag. This frees up the "Verbose" flag to be used
to control whether we print the section index. Additionally, the
DisplayRawContents flag is set for section-based dumps whenever the
--verbose option is passed, but this is not done for the "inline" dumps.
Also note that the index dumping currently does not work for the DWARF
v5 location lists, as the parser does not fill out the appropriate
fields. This will be done in a separate patch.
Reviewers: dblaikie, probinson, JDevlieghere, SouraVX
Subscribers: sdardis, hiraditya, jrtc27, atanasyan, arphaman, aprantl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70227
2019-11-14 18:22:00 +08:00
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# CHECK-NEXT: [0x00000029, 0x00000037) ".text": DW_OP_breg0 EAX+0, DW_OP_deref
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# CHECK-NEXT: [0x00000037, 0x00000063) ".text": DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
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2018-11-02 09:31:52 +08:00
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# CHECK-NEXT: DW_AT_name [DW_FORM_strp]{{.*}}"a"
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#
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# CHECK: DW_TAG_variable
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# CHECK: DW_AT_location [DW_FORM_exprloc]
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# CHECK-NOT: DW_AT_location
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#
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# CHECK: DW_TAG_compile_unit
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2020-10-05 06:42:03 +08:00
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# CHECK: DW_AT_low_pc {{.*}} (0x00000000 ".text")
|
2018-11-02 09:31:52 +08:00
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# CHECK: DW_AT_high_pc
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#
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# CHECK: DW_TAG_subprogram
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# CHECK-NOT: DW_TAG
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# CHECK: DW_AT_linkage_name [DW_FORM_strp]{{.*}}"_Z3bari"
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# CHECK-NOT: {{DW_TAG|NULL}}
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# CHECK: DW_TAG_formal_parameter
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# CHECK-NOT: DW_TAG
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# CHECK: DW_AT_location [DW_FORM_sec_offset] ({{.*}}
|
Re-commit "DWARF location lists: Add section index dumping"
This reapplies c0f6ad7d1f3ccb9d0b9ce9ef8dfa06409ccf1b3e with an
additional fix in test/DebugInfo/X86/constant-loclist.ll, which had a
slightly different output on windows targets. The test now accounts for
this difference.
The original commit message follows.
Summary:
As discussed in D70081, this adds the ability to dump section
names/indices to the location list dumper. It does this by moving the
range specific logic from DWARFDie.cpp:dumpRanges into the
DWARFAddressRange class.
The trickiest part of this patch is the backflip in the meanings of the
two dump flags for the location list sections.
The dumping of "raw" location list data is now controlled by
"DisplayRawContents" flag. This frees up the "Verbose" flag to be used
to control whether we print the section index. Additionally, the
DisplayRawContents flag is set for section-based dumps whenever the
--verbose option is passed, but this is not done for the "inline" dumps.
Also note that the index dumping currently does not work for the DWARF
v5 location lists, as the parser does not fill out the appropriate
fields. This will be done in a separate patch.
Reviewers: dblaikie, probinson, JDevlieghere, SouraVX
Subscribers: sdardis, hiraditya, jrtc27, atanasyan, arphaman, aprantl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70227
2019-11-14 18:22:00 +08:00
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# CHECK-NEXT: [0x00000000, 0x0000000a) ".text": DW_OP_consts +0, DW_OP_stack_value
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# CHECK-NEXT: [0x0000000a, 0x00000017) ".text": DW_OP_consts +1, DW_OP_stack_value)
|
2018-11-02 09:31:52 +08:00
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# CHECK-NEXT: DW_AT_name [DW_FORM_strp]{{.*}}"b"
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#
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# CHECK: .debug_loc contents:
|
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# CHECK: 0x00000000:
|
DWARFDebugLoc(v4): Add an incremental parsing function
Summary:
This adds a visitLocationList function to the DWARF v4 location lists,
similar to what already exists for DWARF v5. It follows the approach
outlined in previous patches (D69672), where the parsed form is always
stored in the DWARF v5 format, which makes it easier for generic code to
be built on top of that. v4 location lists are "upgraded" during
parsing, and then this upgrade is undone while dumping.
Both "inline" and section-based dumping is rewritten to reuse the
existing "generic" location list dumper. This means that the output
format is consistent for all location lists (the only thing one needs to
implement is the function which prints the "raw" form of a location
list), and that debug_loc dumping correctly processes base address
selection entries, etc.
The previous existing debug_loc functionality (e.g.,
parseOneLocationList) is rewritten on top of the new API, but it is not
removed as there is still code which uses them. This will be done in
follow-up patches, after I build the API to access the "interpreted"
location lists in a generic way (as that is what those users really
want).
Reviewers: dblaikie, probinson, JDevlieghere, aprantl, SouraVX
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69847
2019-11-05 21:46:54 +08:00
|
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# CHECK-NEXT: (0x00000000, 0x0000000a): DW_OP_consts +0, DW_OP_stack_value
|
|
|
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|
# CHECK-NEXT: (0x0000000a, 0x00000017): DW_OP_consts +1, DW_OP_stack_value
|
2018-11-02 09:31:52 +08:00
|
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|
# CHECK: 0x00000022:
|
DWARFDebugLoc(v4): Add an incremental parsing function
Summary:
This adds a visitLocationList function to the DWARF v4 location lists,
similar to what already exists for DWARF v5. It follows the approach
outlined in previous patches (D69672), where the parsed form is always
stored in the DWARF v5 format, which makes it easier for generic code to
be built on top of that. v4 location lists are "upgraded" during
parsing, and then this upgrade is undone while dumping.
Both "inline" and section-based dumping is rewritten to reuse the
existing "generic" location list dumper. This means that the output
format is consistent for all location lists (the only thing one needs to
implement is the function which prints the "raw" form of a location
list), and that debug_loc dumping correctly processes base address
selection entries, etc.
The previous existing debug_loc functionality (e.g.,
parseOneLocationList) is rewritten on top of the new API, but it is not
removed as there is still code which uses them. This will be done in
follow-up patches, after I build the API to access the "interpreted"
location lists in a generic way (as that is what those users really
want).
Reviewers: dblaikie, probinson, JDevlieghere, aprantl, SouraVX
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69847
2019-11-05 21:46:54 +08:00
|
|
|
# CHECK-NEXT: (0x00000009, 0x00000017): DW_OP_breg0 EAX+0, DW_OP_deref
|
|
|
|
|
# CHECK-NEXT: (0x00000017, 0x00000043): DW_OP_breg5 EBP-8, DW_OP_deref, DW_OP_deref
|
2018-11-02 09:31:52 +08:00
|
|
|
--- |
|
|
|
|
|
target triple = "i386-unknown-linux-gnu"
|
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|
|
%struct.A = type { i32 (...)**, i32 }
|
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|
|
; Function Attrs: nounwind
|
|
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|
|
define i32 @_Z3bari(i32 %b) #0 !dbg !10 {
|
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|
entry:
|
|
|
|
|
%b.addr = alloca i32, align 4
|
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|
|
store i32 %b, i32* %b.addr, align 4
|
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|
call void @llvm.dbg.value(metadata i32 0, metadata !14, metadata !DIExpression()), !dbg !15
|
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|
%0 = load i32, i32* %b.addr, align 4, !dbg !16
|
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|
call void @llvm.dbg.value(metadata i32 1, metadata !14, metadata !DIExpression()), !dbg !15
|
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|
%add = add nsw i32 %0, 4, !dbg !16
|
|
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|
|
ret i32 %add, !dbg !16
|
|
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|
|
}
|
|
|
|
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|
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|
|
|
; Function Attrs: nounwind readnone speculatable
|
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|
|
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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|
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|
; Function Attrs: nounwind readnone speculatable
|
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|
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
|
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|
|
define void @_Z3baz1A(%struct.A* %a) #2 !dbg !17 {
|
|
|
|
|
entry:
|
|
|
|
|
%z = alloca i32, align 4
|
|
|
|
|
call void @llvm.dbg.declare(metadata %struct.A* %a, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !21
|
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|
|
call void @llvm.dbg.declare(metadata i32* %z, metadata !22, metadata !DIExpression()), !dbg !23
|
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|
|
|
store i32 2, i32* %z, align 4, !dbg !23
|
|
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|
|
%var = getelementptr inbounds %struct.A, %struct.A* %a, i32 0, i32 1, !dbg !24
|
|
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|
|
%0 = load i32, i32* %var, align 4, !dbg !24
|
|
|
|
|
%cmp = icmp sgt i32 %0, 2, !dbg !24
|
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|
|
|
br i1 %cmp, label %if.then, label %if.end, !dbg !24
|
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|
if.then: ; preds = %entry
|
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|
%1 = load i32, i32* %z, align 4, !dbg !26
|
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|
%inc = add nsw i32 %1, 1, !dbg !26
|
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|
store i32 %inc, i32* %z, align 4, !dbg !26
|
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|
br label %if.end, !dbg !26
|
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|
if.end: ; preds = %if.then, %entry
|
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|
%call = call signext i8 @_ZN1A3fooEv(%struct.A* %a), !dbg !27
|
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|
%conv = sext i8 %call to i32, !dbg !27
|
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|
%cmp1 = icmp eq i32 %conv, 97, !dbg !27
|
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|
br i1 %cmp1, label %if.then2, label %if.end4, !dbg !27
|
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|
if.then2: ; preds = %if.end
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|
%2 = load i32, i32* %z, align 4, !dbg !29
|
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|
%inc3 = add nsw i32 %2, 1, !dbg !29
|
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|
store i32 %inc3, i32* %z, align 4, !dbg !29
|
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|
br label %if.end4, !dbg !29
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|
if.end4: ; preds = %if.then2, %if.end
|
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|
ret void, !dbg !30
|
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|
|
}
|
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|
declare signext i8 @_ZN1A3fooEv(%struct.A*) #2
|
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; Function Attrs: nounwind
|
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|
declare void @llvm.stackprotector(i8*, i8**) #3
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|
2019-12-25 07:52:21 +08:00
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|
attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
2018-11-02 09:31:52 +08:00
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|
attributes #1 = { nounwind readnone speculatable }
|
2019-12-25 07:52:21 +08:00
|
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|
attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
2018-11-02 09:31:52 +08:00
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|
attributes #3 = { nounwind }
|
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!llvm.dbg.cu = !{!0, !3}
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|
!llvm.module.flags = !{!7, !8}
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|
!llvm.ident = !{!9, !9}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.5.0 (210479)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
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!1 = !DIFile(filename: "debug-loc-offset1.cc", directory: "/llvm_cmake_gcc")
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!2 = !{}
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|
!3 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !4, producer: "clang version 3.5.0 (210479)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !5, globals: !2, imports: !2)
|
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!4 = !DIFile(filename: "debug-loc-offset2.cc", directory: "/llvm_cmake_gcc")
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!5 = !{!6}
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|
!6 = !DICompositeType(tag: DW_TAG_structure_type, name: "A", file: !4, line: 1, flags: DIFlagFwdDecl, identifier: "_ZTS1A")
|
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|
!7 = !{i32 2, !"Dwarf Version", i32 4}
|
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|
!8 = !{i32 2, !"Debug Info Version", i32 3}
|
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|
!9 = !{!"clang version 3.5.0 (210479)"}
|
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|
!10 = distinct !DISubprogram(name: "bar", linkageName: "_Z3bari", scope: !1, file: !1, line: 1, type: !11, isLocal: false, isDefinition: true, scopeLine: 1, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
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|
!11 = !DISubroutineType(types: !12)
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|
!12 = !{!13, !13}
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|
!13 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
|
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|
!14 = !DILocalVariable(name: "b", arg: 1, scope: !10, file: !1, line: 1, type: !13)
|
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|
!15 = !DILocation(line: 1, scope: !10)
|
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|
!16 = !DILocation(line: 2, scope: !10)
|
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|
|
!17 = distinct !DISubprogram(name: "baz", linkageName: "_Z3baz1A", scope: !4, file: !4, line: 6, type: !18, isLocal: false, isDefinition: true, scopeLine: 6, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !3, retainedNodes: !2)
|
|
|
|
|
!18 = !DISubroutineType(types: !19)
|
|
|
|
|
!19 = !{null, !6}
|
|
|
|
|
!20 = !DILocalVariable(name: "a", arg: 1, scope: !17, file: !4, line: 6, type: !6)
|
|
|
|
|
!21 = !DILocation(line: 6, scope: !17)
|
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|
|
!22 = !DILocalVariable(name: "z", scope: !17, file: !4, line: 7, type: !13)
|
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|
!23 = !DILocation(line: 7, scope: !17)
|
|
|
|
|
!24 = !DILocation(line: 8, scope: !25)
|
|
|
|
|
!25 = distinct !DILexicalBlock(scope: !17, file: !4, line: 8)
|
|
|
|
|
!26 = !DILocation(line: 9, scope: !25)
|
|
|
|
|
!27 = !DILocation(line: 10, scope: !28)
|
|
|
|
|
!28 = distinct !DILexicalBlock(scope: !17, file: !4, line: 10)
|
|
|
|
|
!29 = !DILocation(line: 11, scope: !28)
|
|
|
|
|
!30 = !DILocation(line: 12, scope: !17)
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
---
|
|
|
|
|
name: _Z3bari
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67433
llvm-svn: 371608
2019-09-11 19:16:48 +08:00
|
|
|
alignment: 16
|
2018-11-02 09:31:52 +08:00
|
|
|
tracksRegLiveness: true
|
|
|
|
|
frameInfo:
|
|
|
|
|
stackSize: 8
|
|
|
|
|
offsetAdjustment: -4
|
|
|
|
|
maxAlignment: 4
|
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
|
fixedStack:
|
2019-06-17 17:13:29 +08:00
|
|
|
- { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: default }
|
|
|
|
|
- { id: 1, size: 4, alignment: 16, stack-id: default }
|
2018-11-02 09:31:52 +08:00
|
|
|
stack:
|
2019-06-17 17:13:29 +08:00
|
|
|
- { id: 0, type: spill-slot, offset: -12, size: 4, alignment: 4, stack-id: default }
|
2018-11-02 09:31:52 +08:00
|
|
|
body: |
|
|
|
|
|
bb.0.entry:
|
|
|
|
|
frame-setup PUSH32r killed $ebp, implicit-def $esp, implicit $esp
|
|
|
|
|
CFI_INSTRUCTION def_cfa_offset 8
|
|
|
|
|
CFI_INSTRUCTION offset $ebp, -8
|
|
|
|
|
$ebp = frame-setup MOV32rr $esp
|
|
|
|
|
CFI_INSTRUCTION def_cfa_register $ebp
|
|
|
|
|
frame-setup PUSH32r undef $eax, implicit-def $esp, implicit $esp
|
|
|
|
|
renamable $eax = MOV32rm $ebp, 1, $noreg, 8, $noreg :: (load 4 from %fixed-stack.1)
|
|
|
|
|
DBG_VALUE 0, 0, !14, !DIExpression(), debug-location !15
|
|
|
|
|
renamable $ecx = MOV32rm $ebp, 1, $noreg, 8, $noreg, debug-location !16 :: (load 4 from %ir.b.addr)
|
|
|
|
|
DBG_VALUE 1, 0, !14, !DIExpression(), debug-location !15
|
|
|
|
|
renamable $ecx = ADD32ri8 renamable $ecx, 4, implicit-def $eflags, debug-location !16
|
|
|
|
|
MOV32mr $ebp, 1, $noreg, -4, $noreg, killed $eax :: (store 4 into %fixed-stack.1)
|
|
|
|
|
$eax = MOV32rr killed $ecx, debug-location !16
|
|
|
|
|
$esp = frame-destroy ADD32ri8 $esp, 4, implicit-def dead $eflags, debug-location !16
|
|
|
|
|
$ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !16
|
|
|
|
|
CFI_INSTRUCTION def_cfa $esp, 4, debug-location !16
|
|
|
|
|
RETL implicit killed $eax, debug-location !16
|
|
|
|
|
|
|
|
|
|
...
|
|
|
|
|
---
|
|
|
|
|
name: _Z3baz1A
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67433
llvm-svn: 371608
2019-09-11 19:16:48 +08:00
|
|
|
alignment: 16
|
2018-11-02 09:31:52 +08:00
|
|
|
tracksRegLiveness: true
|
|
|
|
|
frameInfo:
|
|
|
|
|
stackSize: 28
|
|
|
|
|
offsetAdjustment: -24
|
|
|
|
|
maxAlignment: 4
|
|
|
|
|
adjustsStack: true
|
|
|
|
|
hasCalls: true
|
|
|
|
|
maxCallFrameSize: 4
|
|
|
|
|
fixedStack:
|
2019-06-17 17:13:29 +08:00
|
|
|
- { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: default }
|
|
|
|
|
- { id: 1, size: 4, alignment: 16, stack-id: default, isImmutable: true }
|
2018-11-02 09:31:52 +08:00
|
|
|
stack:
|
2019-06-17 17:13:29 +08:00
|
|
|
- { id: 0, name: z, offset: -12, size: 4, alignment: 4, stack-id: default,
|
2018-11-02 09:31:52 +08:00
|
|
|
debug-info-variable: '!22', debug-info-expression: '!DIExpression()',
|
|
|
|
|
debug-info-location: '!23' }
|
2019-06-17 17:13:29 +08:00
|
|
|
- { id: 1, type: spill-slot, offset: -16, size: 4, alignment: 4, stack-id: default }
|
2018-11-02 09:31:52 +08:00
|
|
|
body: |
|
|
|
|
|
bb.0.entry:
|
|
|
|
|
frame-setup PUSH32r killed $ebp, implicit-def $esp, implicit $esp
|
|
|
|
|
CFI_INSTRUCTION def_cfa_offset 8
|
|
|
|
|
CFI_INSTRUCTION offset $ebp, -8
|
|
|
|
|
$ebp = frame-setup MOV32rr $esp
|
|
|
|
|
CFI_INSTRUCTION def_cfa_register $ebp
|
|
|
|
|
$esp = frame-setup SUB32ri8 $esp, 24, implicit-def dead $eflags
|
|
|
|
|
renamable $eax = MOV32rm $ebp, 1, $noreg, 8, $noreg :: (load 4 from %fixed-stack.1)
|
|
|
|
|
DBG_VALUE renamable $eax, 0, !20, !DIExpression(DW_OP_deref), debug-location !21
|
|
|
|
|
MOV32mi $ebp, 1, $noreg, -4, $noreg, 2, debug-location !23 :: (store 4 into %ir.z)
|
|
|
|
|
CMP32mi8 renamable $eax, 1, $noreg, 4, $noreg, 2, implicit-def $eflags, debug-location !24 :: (load 4 from %ir.var)
|
|
|
|
|
MOV32mr $ebp, 1, $noreg, -8, $noreg, killed $eax :: (store 4 into %stack.1)
|
|
|
|
|
DBG_VALUE $ebp, 0, !20, !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !21
|
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-06 03:28:09 +08:00
|
|
|
JCC_1 %bb.2, 14, implicit $eflags, debug-location !24
|
2018-11-02 09:31:52 +08:00
|
|
|
|
|
|
|
|
bb.1.if.then:
|
|
|
|
|
DBG_VALUE $ebp, 0, !20, !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !21
|
|
|
|
|
renamable $eax = MOV32rm $ebp, 1, $noreg, -4, $noreg, debug-location !26 :: (load 4 from %ir.z)
|
|
|
|
|
renamable $eax = ADD32ri8 renamable $eax, 1, implicit-def $eflags, debug-location !26
|
|
|
|
|
MOV32mr $ebp, 1, $noreg, -4, $noreg, killed renamable $eax, debug-location !26 :: (store 4 into %ir.z)
|
|
|
|
|
|
|
|
|
|
bb.2.if.end:
|
|
|
|
|
DBG_VALUE $ebp, 0, !20, !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !21
|
|
|
|
|
$eax = MOV32rm $ebp, 1, $noreg, -8, $noreg :: (load 4 from %stack.1)
|
|
|
|
|
MOV32mr $esp, 1, $noreg, 0, $noreg, killed renamable $eax, debug-location !27 :: (store 4 into stack)
|
|
|
|
|
CALLpcrel32 @_ZN1A3fooEv, csr_32, implicit $esp, implicit $ssp, implicit-def $al, debug-location !27
|
|
|
|
|
renamable $ecx = MOVSX32rr8 killed renamable $al, debug-location !27
|
|
|
|
|
CMP32ri8 killed renamable $ecx, 97, implicit-def $eflags, debug-location !27
|
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-06 03:28:09 +08:00
|
|
|
JCC_1 %bb.4, 5, implicit $eflags, debug-location !27
|
2018-11-02 09:31:52 +08:00
|
|
|
|
|
|
|
|
bb.3.if.then2:
|
|
|
|
|
DBG_VALUE $ebp, 0, !20, !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !21
|
|
|
|
|
renamable $eax = MOV32rm $ebp, 1, $noreg, -4, $noreg, debug-location !29 :: (load 4 from %ir.z)
|
|
|
|
|
renamable $eax = ADD32ri8 renamable $eax, 1, implicit-def $eflags, debug-location !29
|
|
|
|
|
MOV32mr $ebp, 1, $noreg, -4, $noreg, killed renamable $eax, debug-location !29 :: (store 4 into %ir.z)
|
|
|
|
|
|
|
|
|
|
bb.4.if.end4:
|
|
|
|
|
DBG_VALUE $ebp, 0, !20, !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !21
|
|
|
|
|
$esp = frame-destroy ADD32ri8 $esp, 24, implicit-def dead $eflags, debug-location !30
|
|
|
|
|
$ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !30
|
|
|
|
|
CFI_INSTRUCTION def_cfa $esp, 4, debug-location !30
|
|
|
|
|
RETL debug-location !30
|
|
|
|
|
|
|
|
|
|
...
|