llvm-project/llvm/test/MC/ARM/vmov-pair-diags.s

@ RUN: not llvm-mc -triple armv7-eabi < %s 2>&1 | FileCheck %s

vmov	r0, r1, s0, s2
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: source operands must be sequential
vmov	s0, s2, r0, r1
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: destination operands must be sequential
[ARM][Asm] VMOVSRR and VMOVRRS need sequential S registers These instructions require that the two S registers are adjacent (but not the R registers), because only the first register is included in the encoding, but we were not checking this in the assembler. Differential revision: https://reviews.llvm.org/D44084 llvm-svn: 326696 2018-03-05 21:27:26 +08:00			`@ RUN: not llvm-mc -triple armv7-eabi < %s 2>&1 \| FileCheck %s`

			`vmov r0, r1, s0, s2`
			`// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: source operands must be sequential`
			`vmov s0, s2, r0, r1`
			`// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: destination operands must be sequential`