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llvm-project/llvm/test/MC/ARM/neont2-vld-encoding.s

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Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
.code 16
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
vld1.8 {d16}, [r0:64]
@ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.16 {d16}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.32 {d16}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.64 {d16}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld1.8 {d16, d17}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.16 {d16, d17}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x0a]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld1.16 {d16, d17}, [r0:128]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x60,0xf9,0x8f,0x0a]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.32 {d16, d17}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0x60,0xf9,0xcf,0x0a]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.64 {d16, d17}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x08]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.8 {d16, d17}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.16 {d16, d17}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x08]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.16 {d16, d17}, [r0:128]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.32 {d16, d17}, [r0] @ encoding: [0x60,0xf9,0x8f,0x08]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld2.32 {d16, d17}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.8 {d16, d17, d18, d19}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x03]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.8 {d16, d17, d18, d19}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.16 {d16, d17, d18, d19}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x03]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.16 {d16, d17, d18, d19}, [r0:128]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.32 {d16, d17, d18, d19}, [r0:256] @ encoding: [0x60,0xf9,0xbf,0x03]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.32 {d16, d17, d18, d19}, [r0:256]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.8 {d16, d17, d18}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x04]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld3.8 {d16, d17, d18}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x60,0xf9,0x4f,0x04]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.16 {d16, d17, d18}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x60,0xf9,0x8f,0x04]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.32 {d16, d17, d18}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.8 {d16, d18, d20}, [r0:64]! @ encoding: [0x60,0xf9,0x1d,0x05]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld3.8 {d16, d18, d20}, [r0:64]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.8 {d17, d19, d21}, [r0:64]! @ encoding: [0x60,0xf9,0x1d,0x15]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld3.8 {d17, d19, d21}, [r0:64]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x60,0xf9,0x4d,0x05]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.16 {d16, d18, d20}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x60,0xf9,0x4d,0x15]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.16 {d17, d19, d21}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x60,0xf9,0x8d,0x05]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.32 {d16, d18, d20}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x60,0xf9,0x8d,0x15]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.32 {d17, d19, d21}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.8 {d16, d17, d18, d19}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x00]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.8 {d16, d17, d18, d19}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.16 {d16, d17, d18, d19}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x00]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.16 {d16, d17, d18, d19}, [r0:128]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.32 {d16, d17, d18, d19}, [r0:256] @ encoding: [0x60,0xf9,0xbf,0x00]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.32 {d16, d17, d18, d19}, [r0:256]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.8 {d16, d18, d20, d22}, [r0:256]! @ encoding: [0x60,0xf9,0x3d,0x01]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.8 {d16, d18, d20, d22}, [r0:256]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.8 {d17, d19, d21, d23}, [r0:256]! @ encoding: [0x60,0xf9,0x3d,0x11]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.8 {d17, d19, d21, d23}, [r0:256]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x60,0xf9,0x4d,0x01]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.16 {d16, d18, d20, d22}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x60,0xf9,0x4d,0x11]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.16 {d17, d19, d21, d23}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x60,0xf9,0x8d,0x01]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.32 {d16, d18, d20, d22}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x60,0xf9,0x8d,0x11]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.32 {d17, d19, d21, d23}, [r0]!
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0xe0,0xf9,0x6f,0x00]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld1.8 {d16[3]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.16 {d16[2]}, [r0:16] @ encoding: [0xe0,0xf9,0x9f,0x04]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld1.16 {d16[2]}, [r0:16]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld1.32 {d16[1]}, [r0:32] @ encoding: [0xe0,0xf9,0xbf,0x08]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld1.32 {d16[1]}, [r0:32]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.8 {d16[1], d17[1]}, [r0:16] @ encoding: [0xe0,0xf9,0x3f,0x01]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.8 {d16[1], d17[1]}, [r0:16]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.16 {d16[1], d17[1]}, [r0:32] @ encoding: [0xe0,0xf9,0x5f,0x05]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.16 {d16[1], d17[1]}, [r0:32]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0xe0,0xf9,0x8f,0x09]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld2.32 {d16[1], d17[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0xe0,0xf9,0x6f,0x15]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld2.16 {d17[1], d19[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld2.32 {d17[0], d19[0]}, [r0:64] @ encoding: [0xe0,0xf9,0x5f,0x19]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld2.32 {d17[0], d19[0]}, [r0:64]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0xe0,0xf9,0x2f,0x02]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.8 {d16[1], d17[1], d18[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0xe0,0xf9,0x4f,0x06]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.16 {d16[1], d17[1], d18[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0xe0,0xf9,0x8f,0x0a]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.32 {d16[1], d17[1], d18[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] @ encoding: [0xe0,0xf9,0x6f,0x06]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.16 {d16[1], d18[1], d20[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0] @ encoding: [0xe0,0xf9,0xcf,0x1a]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld3.32 {d17[1], d19[1], d21[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] @ encoding: [0xe0,0xf9,0x3f,0x03]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0xe0,0xf9,0x4f,0x07]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] @ encoding: [0xe0,0xf9,0xaf,0x0b]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] @ encoding: [0xe0,0xf9,0x7f,0x07]
Make ARMAsmParser accept the correct alignment specifier syntax in instructions. The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
2013-02-14 22:46:12 +08:00
vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64]
This patch fixes two tests marked as XFAIL among the ARM assembler tests. The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). llvm-svn: 181420
2013-05-08 17:41:12 +08:00
@ CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0xe0,0xf9,0x4f,0x1b]
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. llvm-svn: 118843
2010-11-12 05:36:43 +08:00
vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]