2011-01-03 07:04:14 +08:00
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; RUN: opt < %s -S -early-cse | FileCheck %s
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2015-02-01 18:51:23 +08:00
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; RUN: opt < %s -S -passes=early-cse | FileCheck %s
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2011-01-03 07:04:14 +08:00
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2014-11-04 04:21:32 +08:00
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declare void @llvm.assume(i1) nounwind
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2011-01-03 07:04:14 +08:00
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2013-07-14 09:42:54 +08:00
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; CHECK-LABEL: @test1(
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2011-01-03 07:04:14 +08:00
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define void @test1(i8 %V, i32 *%P) {
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%A = bitcast i64 42 to double ;; dead
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%B = add i32 4, 19 ;; constant folds
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store i32 %B, i32* %P
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; CHECK-NEXT: store i32 23, i32* %P
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%C = zext i8 %V to i32
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%D = zext i8 %V to i32 ;; CSE
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2011-11-27 14:54:59 +08:00
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store volatile i32 %C, i32* %P
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store volatile i32 %D, i32* %P
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2011-01-03 07:04:14 +08:00
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; CHECK-NEXT: %C = zext i8 %V to i32
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2011-08-13 06:50:01 +08:00
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; CHECK-NEXT: store volatile i32 %C
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; CHECK-NEXT: store volatile i32 %C
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2011-01-03 07:19:45 +08:00
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%E = add i32 %C, %C
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%F = add i32 %C, %C
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2011-11-27 14:54:59 +08:00
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store volatile i32 %E, i32* %P
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store volatile i32 %F, i32* %P
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2011-01-03 07:19:45 +08:00
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; CHECK-NEXT: %E = add i32 %C, %C
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2011-08-13 06:50:01 +08:00
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; CHECK-NEXT: store volatile i32 %E
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; CHECK-NEXT: store volatile i32 %E
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2011-01-03 07:19:45 +08:00
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2016-04-22 22:12:50 +08:00
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%G = add nuw i32 %C, %C
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2011-11-27 14:54:59 +08:00
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store volatile i32 %G, i32* %P
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2016-04-22 22:12:50 +08:00
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; CHECK-NEXT: store volatile i32 %E
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2011-01-03 07:04:14 +08:00
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|
ret void
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}
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2011-01-03 11:18:43 +08:00
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;; Simple load value numbering.
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2013-07-14 09:42:54 +08:00
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; CHECK-LABEL: @test2(
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2011-01-03 11:18:43 +08:00
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define i32 @test2(i32 *%P) {
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2015-02-28 05:17:42 +08:00
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%V1 = load i32, i32* %P
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%V2 = load i32, i32* %P
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2011-01-03 11:18:43 +08:00
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: ret i32 0
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}
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2014-11-04 04:21:32 +08:00
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|
; CHECK-LABEL: @test2a(
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|
define i32 @test2a(i32 *%P, i1 %b) {
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2015-02-28 05:17:42 +08:00
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|
%V1 = load i32, i32* %P
|
2014-11-04 04:21:32 +08:00
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|
|
tail call void @llvm.assume(i1 %b)
|
2015-02-28 05:17:42 +08:00
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|
%V2 = load i32, i32* %P
|
2014-11-04 04:21:32 +08:00
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|
%Diff = sub i32 %V1, %V2
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|
ret i32 %Diff
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; CHECK: ret i32 0
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}
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2011-01-03 11:18:43 +08:00
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;; Cross block load value numbering.
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2013-07-14 09:42:54 +08:00
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|
; CHECK-LABEL: @test3(
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2011-01-03 11:18:43 +08:00
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|
|
define i32 @test3(i32 *%P, i1 %Cond) {
|
2015-02-28 05:17:42 +08:00
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|
%V1 = load i32, i32* %P
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2011-01-03 11:18:43 +08:00
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br i1 %Cond, label %T, label %F
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T:
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store i32 4, i32* %P
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ret i32 42
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F:
|
2015-02-28 05:17:42 +08:00
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|
%V2 = load i32, i32* %P
|
2011-01-03 11:18:43 +08:00
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|
%Diff = sub i32 %V1, %V2
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|
ret i32 %Diff
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; CHECK: F:
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|
; CHECK: ret i32 0
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|
}
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|
2014-11-04 04:21:32 +08:00
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|
|
; CHECK-LABEL: @test3a(
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|
|
|
define i32 @test3a(i32 *%P, i1 %Cond, i1 %b) {
|
2015-02-28 05:17:42 +08:00
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|
%V1 = load i32, i32* %P
|
2014-11-04 04:21:32 +08:00
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|
br i1 %Cond, label %T, label %F
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T:
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store i32 4, i32* %P
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ret i32 42
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F:
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|
|
tail call void @llvm.assume(i1 %b)
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2015-02-28 05:17:42 +08:00
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|
%V2 = load i32, i32* %P
|
2014-11-04 04:21:32 +08:00
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|
%Diff = sub i32 %V1, %V2
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|
ret i32 %Diff
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; CHECK: F:
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|
; CHECK: ret i32 0
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}
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|
2011-01-03 11:18:43 +08:00
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|
;; Cross block load value numbering stops when stores happen.
|
2013-07-14 09:42:54 +08:00
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|
|
; CHECK-LABEL: @test4(
|
2011-01-03 11:18:43 +08:00
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|
|
define i32 @test4(i32 *%P, i1 %Cond) {
|
2015-02-28 05:17:42 +08:00
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|
%V1 = load i32, i32* %P
|
2011-01-03 11:18:43 +08:00
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|
|
br i1 %Cond, label %T, label %F
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T:
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ret i32 42
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F:
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|
; Clobbers V1
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store i32 42, i32* %P
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|
2015-02-28 05:17:42 +08:00
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|
%V2 = load i32, i32* %P
|
2011-01-03 11:18:43 +08:00
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|
%Diff = sub i32 %V1, %V2
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|
ret i32 %Diff
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|
; CHECK: F:
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|
; CHECK: ret i32 %Diff
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}
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2011-01-03 11:33:47 +08:00
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|
|
declare i32 @func(i32 *%P) readonly
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;; Simple call CSE'ing.
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2013-07-14 09:42:54 +08:00
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|
|
; CHECK-LABEL: @test5(
|
2011-01-03 11:33:47 +08:00
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|
|
define i32 @test5(i32 *%P) {
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|
%V1 = call i32 @func(i32* %P)
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|
%V2 = call i32 @func(i32* %P)
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|
%Diff = sub i32 %V1, %V2
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|
ret i32 %Diff
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|
|
; CHECK: ret i32 0
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|
}
|
2011-01-03 11:46:34 +08:00
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|
;; Trivial Store->load forwarding
|
2013-07-14 09:42:54 +08:00
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|
|
; CHECK-LABEL: @test6(
|
2011-01-03 11:46:34 +08:00
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|
|
define i32 @test6(i32 *%P) {
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|
store i32 42, i32* %P
|
2015-02-28 05:17:42 +08:00
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|
|
%V1 = load i32, i32* %P
|
2011-01-03 11:46:34 +08:00
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|
|
ret i32 %V1
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|
|
; CHECK: ret i32 42
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}
|
2011-01-03 12:17:24 +08:00
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|
|
|
2014-11-04 04:21:32 +08:00
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|
|
; CHECK-LABEL: @test6a(
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|
|
|
define i32 @test6a(i32 *%P, i1 %b) {
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|
|
|
store i32 42, i32* %P
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|
|
|
tail call void @llvm.assume(i1 %b)
|
2015-02-28 05:17:42 +08:00
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|
|
%V1 = load i32, i32* %P
|
2014-11-04 04:21:32 +08:00
|
|
|
ret i32 %V1
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|
|
|
; CHECK: ret i32 42
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|
|
|
}
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|
|
|
|
2011-01-03 12:17:24 +08:00
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|
|
;; Trivial dead store elimination.
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test7(
|
2011-01-03 12:17:24 +08:00
|
|
|
define void @test7(i32 *%P) {
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|
|
|
store i32 42, i32* %P
|
|
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|
store i32 45, i32* %P
|
|
|
|
ret void
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|
|
|
; CHECK-NEXT: store i32 45
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|
|
|
; CHECK-NEXT: ret void
|
|
|
|
}
|
2011-01-04 07:38:13 +08:00
|
|
|
|
|
|
|
;; Readnone functions aren't invalidated by stores.
|
2013-07-14 09:42:54 +08:00
|
|
|
; CHECK-LABEL: @test8(
|
2011-01-04 07:38:13 +08:00
|
|
|
define i32 @test8(i32 *%P) {
|
|
|
|
%V1 = call i32 @func(i32* %P) readnone
|
|
|
|
store i32 4, i32* %P
|
|
|
|
%V2 = call i32 @func(i32* %P) readnone
|
|
|
|
%Diff = sub i32 %V1, %V2
|
|
|
|
ret i32 %Diff
|
|
|
|
; CHECK: ret i32 0
|
|
|
|
}
|
|
|
|
|
2014-11-19 01:46:32 +08:00
|
|
|
;; Trivial DSE can't be performed across a readonly call. The call
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|
|
|
;; can observe the earlier write.
|
|
|
|
; CHECK-LABEL: @test9(
|
|
|
|
define i32 @test9(i32 *%P) {
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|
|
|
store i32 4, i32* %P
|
|
|
|
%V1 = call i32 @func(i32* %P) readonly
|
|
|
|
store i32 5, i32* %P
|
|
|
|
ret i32 %V1
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|
|
|
; CHECK: store i32 4, i32* %P
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|
|
|
; CHECK-NEXT: %V1 = call i32 @func(i32* %P)
|
|
|
|
; CHECK-NEXT: store i32 5, i32* %P
|
|
|
|
; CHECK-NEXT: ret i32 %V1
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Trivial DSE can be performed across a readnone call.
|
|
|
|
; CHECK-LABEL: @test10
|
|
|
|
define i32 @test10(i32 *%P) {
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|
|
|
store i32 4, i32* %P
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|
|
|
%V1 = call i32 @func(i32* %P) readnone
|
|
|
|
store i32 5, i32* %P
|
|
|
|
ret i32 %V1
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|
|
|
; CHECK-NEXT: %V1 = call i32 @func(i32* %P)
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|
|
|
; CHECK-NEXT: store i32 5, i32* %P
|
|
|
|
; CHECK-NEXT: ret i32 %V1
|
|
|
|
}
|
|
|
|
|
|
|
|
;; Trivial dead store elimination - should work for an entire series of dead stores too.
|
|
|
|
; CHECK-LABEL: @test11(
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|
|
|
define void @test11(i32 *%P) {
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|
|
|
store i32 42, i32* %P
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|
|
store i32 43, i32* %P
|
|
|
|
store i32 44, i32* %P
|
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|
|
store i32 45, i32* %P
|
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|
|
ret void
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|
|
|
; CHECK-NEXT: store i32 45
|
|
|
|
; CHECK-NEXT: ret void
|
|
|
|
}
|
|
|
|
|
2015-02-11 07:11:02 +08:00
|
|
|
; CHECK-LABEL: @test12(
|
2015-02-11 07:09:43 +08:00
|
|
|
define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
|
2015-02-28 05:17:42 +08:00
|
|
|
%load0 = load i32, i32* %P1
|
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|
|
%1 = load atomic i32, i32* %P2 seq_cst, align 4
|
|
|
|
%load1 = load i32, i32* %P1
|
2015-02-11 07:09:43 +08:00
|
|
|
%sel = select i1 %B, i32 %load0, i32 %load1
|
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|
|
ret i32 %sel
|
2015-02-28 05:17:42 +08:00
|
|
|
; CHECK: load i32, i32* %P1
|
|
|
|
; CHECK: load i32, i32* %P1
|
2015-02-11 07:09:43 +08:00
|
|
|
}
|
2015-12-16 09:01:30 +08:00
|
|
|
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|
|
|
define void @dse1(i32 *%P) {
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|
|
|
; CHECK-LABEL: @dse1
|
|
|
|
; CHECK-NOT: store
|
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|
|
%v = load i32, i32* %P
|
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|
|
store i32 %v, i32* %P
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
define void @dse2(i32 *%P) {
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|
|
|
; CHECK-LABEL: @dse2
|
|
|
|
; CHECK-NOT: store
|
|
|
|
%v = load atomic i32, i32* %P seq_cst, align 4
|
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|
|
store i32 %v, i32* %P
|
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|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
define void @dse3(i32 *%P) {
|
|
|
|
; CHECK-LABEL: @dse3
|
|
|
|
; CHECK-NOT: store
|
|
|
|
%v = load atomic i32, i32* %P seq_cst, align 4
|
|
|
|
store atomic i32 %v, i32* %P unordered, align 4
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
define i32 @dse4(i32 *%P, i32 *%Q) {
|
|
|
|
; CHECK-LABEL: @dse4
|
|
|
|
; CHECK-NOT: store
|
|
|
|
; CHECK: ret i32 0
|
|
|
|
%a = load i32, i32* %Q
|
|
|
|
%v = load atomic i32, i32* %P unordered, align 4
|
|
|
|
store atomic i32 %v, i32* %P unordered, align 4
|
|
|
|
%b = load i32, i32* %Q
|
|
|
|
%res = sub i32 %a, %b
|
|
|
|
ret i32 %res
|
|
|
|
}
|
|
|
|
|
|
|
|
; Note that in this example, %P and %Q could in fact be the same
|
|
|
|
; pointer. %v could be different than the value observed for %a
|
|
|
|
; and that's okay because we're using relaxed memory ordering.
|
|
|
|
; The only guarantee we have to provide is that each of the loads
|
|
|
|
; has to observe some value written to that location. We do
|
|
|
|
; not have to respect the order in which those writes were done.
|
|
|
|
define i32 @dse5(i32 *%P, i32 *%Q) {
|
|
|
|
; CHECK-LABEL: @dse5
|
|
|
|
; CHECK-NOT: store
|
|
|
|
; CHECK: ret i32 0
|
|
|
|
%v = load atomic i32, i32* %P unordered, align 4
|
|
|
|
%a = load atomic i32, i32* %Q unordered, align 4
|
|
|
|
store atomic i32 %v, i32* %P unordered, align 4
|
|
|
|
%b = load atomic i32, i32* %Q unordered, align 4
|
|
|
|
%res = sub i32 %a, %b
|
|
|
|
ret i32 %res
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
define void @dse_neg1(i32 *%P) {
|
|
|
|
; CHECK-LABEL: @dse_neg1
|
|
|
|
; CHECK: store
|
|
|
|
%v = load i32, i32* %P
|
|
|
|
store i32 5, i32* %P
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; Could remove the store, but only if ordering was somehow
|
|
|
|
; encoded.
|
|
|
|
define void @dse_neg2(i32 *%P) {
|
|
|
|
; CHECK-LABEL: @dse_neg2
|
|
|
|
; CHECK: store
|
|
|
|
%v = load i32, i32* %P
|
|
|
|
store atomic i32 %v, i32* %P seq_cst, align 4
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|