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llvm-project/llvm/test/CodeGen/X86/x86-64-and-mask.ll

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fix test attributes; these are x86-64 tests, not Nehalem tests llvm-svn: 228536
2015-02-09 04:05:53 +08:00
; RUN: llc < %s | FileCheck %s
Compile x86-64-and-mask.ll into: _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. llvm-svn: 47658
2008-02-27 13:47:54 +08:00
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
; This should be a single mov, not a load of immediate + andq.
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
2013-07-14 04:38:47 +08:00
; CHECK-LABEL: test:
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
; CHECK: movl %edi, %eax
define i64 @test(i64 %x) nounwind {
Compile x86-64-and-mask.ll into: _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. llvm-svn: 47658
2008-02-27 13:47:54 +08:00
entry:
%tmp123 = and i64 %x, 4294967295 ; <i64> [#uses=1]
ret i64 %tmp123
}
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
; This copy can't be coalesced away because it needs the implicit zero-extend.
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: bbb:
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
; CHECK: movl %edi, %edi
define void @bbb(i64 %x) nounwind {
%t = and i64 %x, 4294967295
call void @foo(i64 %t)
ret void
}
; This should use a 32-bit and with implicit zero-extension, not a 64-bit and
; with a separate mov to materialize the mask.
; rdar://7527390
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: ccc:
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
; CHECK: andl $-1048593, %edi
declare void @foo(i64 %x) nounwind
define void @ccc(i64 %x) nounwind {
%t = and i64 %x, 4293918703
call void @foo(i64 %t)
ret void
}
; This requires a mov and a 64-bit and.
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: ddd:
Fix a batch of x86 tests to be coalescer independent. Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. llvm-svn: 130891
2011-05-05 07:54:51 +08:00
; CHECK: movabsq $4294967296, %r
Allocate local registers in order for optimal coloring. Also avoid locals evicting locals just because they want a cheaper register. Problem: MI Sched knows exactly how many registers we have and assumes they can be colored. In cases where we have large blocks, usually from unrolled loops, greedy coloring fails. This is a source of "regressions" from the MI Scheduler on x86. I noticed this issue on x86 where we have long chains of two-address defs in the same live range. It's easy to see this in matrix multiplication benchmarks like IRSmk and even the unit test misched-matmul.ll. A fundamental difference between the LLVM register allocator and conventional graph coloring is that in our model a live range can't discover its neighbors, it can only verify its neighbors. That's why we initially went for greedy coloring and added eviction to deal with the hard cases. However, for singly defined and two-address live ranges, we can optimally color without visiting neighbors simply by processing the live ranges in instruction order. Other beneficial side effects: It is much easier to understand and debug regalloc for large blocks when the live ranges are allocated in order. Yes, global allocation is still very confusing, but it's nice to be able to comprehend what happened locally. Heuristics could be added to bias register assignment based on instruction locality (think late register pairing, banks...). Intuituvely this will make some test cases that are on the threshold of register pressure more stable. llvm-svn: 187139
2013-07-26 02:35:14 +08:00
; CHECK: andq %r{{..}}, %r{{..}}
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160
2010-01-12 01:58:34 +08:00
define void @ddd(i64 %x) nounwind {
%t = and i64 %x, 4294967296
call void @foo(i64 %t)
ret void
}