forked from OSchip/llvm-project
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
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; RUN: llc -regalloc=greedy -mtriple=x86_64-unknown-linux-gnu < %s -o - | FileCheck %s
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;
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; The test is to check no redundent mov as follows will be generated in %while.body loop.
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; .LBB0_2:
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; movsbl %cl, %ecx
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; movl %edx, %eax ==> This movl can be promoted outside of loop.
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; shll $5, %eax
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; ...
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; movl %eax, %edx
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; jne .LBB0_2
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;
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; CHECK-LABEL: foo:
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; CHECK: [[L0:.LBB0_[0-9]+]]: # %while.body
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; CHECK: movl %[[REGA:.*]], %[[REGB:.*]]
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; CHECK-NOT: movl %[[REGB]], %[[REGA]]
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; CHECK: jne [[L0]]
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@b = common local_unnamed_addr global i8* null, align 8
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@a = common local_unnamed_addr global i32 0, align 4
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define i32 @foo() local_unnamed_addr {
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entry:
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%t0 = load i8*, i8** @b, align 8
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%t1 = load i8, i8* %t0, align 1
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%cmp4 = icmp eq i8 %t1, 0
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%t2 = load i32, i32* @a, align 4
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br i1 %cmp4, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body.preheader, %while.body
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%t3 = phi i32 [ %add3, %while.body ], [ %t2, %while.body.preheader ]
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%t4 = phi i8 [ %t5, %while.body ], [ %t1, %while.body.preheader ]
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%conv = sext i8 %t4 to i32
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%add = mul i32 %t3, 33
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%add3 = add nsw i32 %add, %conv
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store i32 %add3, i32* @a, align 4
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%t5 = load i8, i8* %t0, align 1
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%cmp = icmp eq i8 %t5, 0
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br i1 %cmp, label %while.end.loopexit, label %while.body
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while.end.loopexit: ; preds = %while.body
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br label %while.end
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while.end: ; preds = %while.end.loopexit, %entry
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%.lcssa = phi i32 [ %t2, %entry ], [ %add3, %while.end.loopexit ]
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ret i32 %.lcssa
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}
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