2015-05-29 03:09:30 +08:00
|
|
|
//===- Chunks.cpp ---------------------------------------------------------===//
|
|
|
|
//
|
2019-01-19 16:50:56 +08:00
|
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
2015-05-29 03:09:30 +08:00
|
|
|
//
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|
|
|
//===----------------------------------------------------------------------===//
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|
|
|
|
|
|
|
#include "Chunks.h"
|
|
|
|
#include "InputFiles.h"
|
2015-08-06 03:51:28 +08:00
|
|
|
#include "Symbols.h"
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
#include "Writer.h"
|
2018-11-09 02:38:17 +08:00
|
|
|
#include "SymbolTable.h"
|
[lld] unified COFF and ELF error handling on new Common/ErrorHandler
Summary:
The COFF linker and the ELF linker have long had similar but separate
Error.h and Error.cpp files to implement error handling. This change
introduces new error handling code in Common/ErrorHandler.h, changes the
COFF and ELF linkers to use it, and removes the old, separate
implementations.
Reviewers: ruiu
Reviewed By: ruiu
Subscribers: smeenai, jyknight, emaste, sdardis, nemanjai, nhaehnle, mgorny, javed.absar, kbarton, fedor.sergeev, llvm-commits
Differential Revision: https://reviews.llvm.org/D39259
llvm-svn: 316624
2017-10-26 06:28:38 +08:00
|
|
|
#include "lld/Common/ErrorHandler.h"
|
2017-01-14 06:05:22 +08:00
|
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|
#include "llvm/ADT/Twine.h"
|
2017-06-07 11:48:56 +08:00
|
|
|
#include "llvm/BinaryFormat/COFF.h"
|
2015-05-29 03:09:30 +08:00
|
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|
#include "llvm/Object/COFF.h"
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#include "llvm/Support/Debug.h"
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|
#include "llvm/Support/Endian.h"
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|
#include "llvm/Support/raw_ostream.h"
|
2015-06-20 15:25:45 +08:00
|
|
|
#include <algorithm>
|
2015-05-29 03:09:30 +08:00
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|
2015-06-07 06:46:15 +08:00
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using namespace llvm;
|
2015-05-29 03:09:30 +08:00
|
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::COFF;
|
2015-07-25 07:51:14 +08:00
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using llvm::support::ulittle32_t;
|
2015-05-29 03:09:30 +08:00
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namespace lld {
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namespace coff {
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|
2017-07-27 07:05:24 +08:00
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SectionChunk::SectionChunk(ObjFile *f, const coff_section *h)
|
2019-05-04 04:17:14 +08:00
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: Chunk(SectionKind), file(f), header(h), repl(this) {
|
2019-07-16 16:26:38 +08:00
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// Initialize relocs.
|
2019-05-04 04:17:14 +08:00
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setRelocs(file->getCOFFObj()->getRelocations(header));
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|
2019-07-16 16:26:38 +08:00
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// Initialize sectionName.
|
2019-05-04 04:17:14 +08:00
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StringRef sectionName;
|
2019-05-02 18:32:03 +08:00
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|
if (Expected<StringRef> e = file->getCOFFObj()->getSectionName(header))
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sectionName = *e;
|
2019-05-04 04:17:14 +08:00
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sectionNameData = sectionName.data();
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sectionNameSize = sectionName.size();
|
2015-06-10 12:21:47 +08:00
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|
2019-05-23 04:21:52 +08:00
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|
setAlignment(header->getAlignment());
|
2015-09-17 05:40:47 +08:00
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|
2019-05-25 04:25:40 +08:00
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|
|
hasData = !(header->Characteristics & IMAGE_SCN_CNT_UNINITIALIZED_DATA);
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|
2017-06-17 04:47:19 +08:00
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|
// If linker GC is disabled, every chunk starts out alive. If linker GC is
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|
|
|
// enabled, treat non-comdat sections as roots. Generally optimized object
|
|
|
|
// files will be built with -ffunction-sections or /Gy, so most things worth
|
|
|
|
// stripping will be in a comdat.
|
|
|
|
live = !config->doGC || !isCOMDAT();
|
2015-05-29 03:09:30 +08:00
|
|
|
}
|
|
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|
|
[COFF] Reduce the size of Chunk and SectionChunk, NFC
Summary:
Reorder the fields in both to use padding more efficiently, and add more
comments on the purpose of the fields.
Replace `std::vector<SectionChunk*> AssociativeChildren` with a
singly-linked list. This avoids the separate vector allocation to list
associative children, and shrinks the 3 pointers used for the typically
empty vector down to 1.
In the end, this reduces the sum of heap allocations used to link
browser_tests.exe with NO PDB by 13.10%, going from 2,248,728 KB to
1,954,071 KB of heap. These numbers exclude memory mapped files, which
are of course a significant factor in LLD's memory usage.
Reviewers: ruiu, mstorsjo, aganea
Subscribers: jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59797
llvm-svn: 357535
2019-04-03 06:11:58 +08:00
|
|
|
// SectionChunk is one of the most frequently allocated classes, so it is
|
|
|
|
// important to keep it as compact as possible. As of this writing, the number
|
|
|
|
// below is the size of this class on x64 platforms.
|
2019-05-25 04:25:40 +08:00
|
|
|
static_assert(sizeof(SectionChunk) <= 88, "SectionChunk grew unexpectedly");
|
[COFF] Reduce the size of Chunk and SectionChunk, NFC
Summary:
Reorder the fields in both to use padding more efficiently, and add more
comments on the purpose of the fields.
Replace `std::vector<SectionChunk*> AssociativeChildren` with a
singly-linked list. This avoids the separate vector allocation to list
associative children, and shrinks the 3 pointers used for the typically
empty vector down to 1.
In the end, this reduces the sum of heap allocations used to link
browser_tests.exe with NO PDB by 13.10%, going from 2,248,728 KB to
1,954,071 KB of heap. These numbers exclude memory mapped files, which
are of course a significant factor in LLD's memory usage.
Reviewers: ruiu, mstorsjo, aganea
Subscribers: jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59797
llvm-svn: 357535
2019-04-03 06:11:58 +08:00
|
|
|
|
2015-06-25 08:33:38 +08:00
|
|
|
static void add16(uint8_t *p, int16_t v) { write16le(p, read16le(p) + v); }
|
|
|
|
static void add32(uint8_t *p, int32_t v) { write32le(p, read32le(p) + v); }
|
|
|
|
static void add64(uint8_t *p, int64_t v) { write64le(p, read64le(p) + v); }
|
2015-07-25 11:03:46 +08:00
|
|
|
static void or16(uint8_t *p, uint16_t v) { write16le(p, read16le(p) | v); }
|
2017-07-11 15:22:44 +08:00
|
|
|
static void or32(uint8_t *p, uint32_t v) { write32le(p, read32le(p) | v); }
|
2015-06-25 08:33:38 +08:00
|
|
|
|
2018-02-18 04:28:15 +08:00
|
|
|
// Verify that given sections are appropriate targets for SECREL
|
|
|
|
// relocations. This check is relaxed because unfortunately debug
|
|
|
|
// sections have section-relative relocations against absolute symbols.
|
|
|
|
static bool checkSecRel(const SectionChunk *sec, OutputSection *os) {
|
|
|
|
if (os)
|
|
|
|
return true;
|
|
|
|
if (sec->isCodeView())
|
|
|
|
return false;
|
2018-08-22 19:34:58 +08:00
|
|
|
error("SECREL relocation cannot be applied to absolute symbols");
|
|
|
|
return false;
|
2018-02-18 04:28:15 +08:00
|
|
|
}
|
|
|
|
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
static void applySecRel(const SectionChunk *sec, uint8_t *off,
|
|
|
|
OutputSection *os, uint64_t s) {
|
2018-02-18 04:28:15 +08:00
|
|
|
if (!checkSecRel(sec, os))
|
|
|
|
return;
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
uint64_t secRel = s - os->getRVA();
|
2017-09-20 08:21:58 +08:00
|
|
|
if (secRel > UINT32_MAX) {
|
|
|
|
error("overflow in SECREL relocation in section: " + sec->getSectionName());
|
|
|
|
return;
|
|
|
|
}
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
add32(off, secRel);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applySecIdx(uint8_t *off, OutputSection *os) {
|
2018-02-18 04:41:38 +08:00
|
|
|
// Absolute symbol doesn't have section index, but section index relocation
|
|
|
|
// against absolute symbol should be resolved to one plus the last output
|
|
|
|
// section index. This is required for compatibility with MSVC.
|
|
|
|
if (os)
|
|
|
|
add16(off, os->sectionIndex);
|
|
|
|
else
|
|
|
|
add16(off, DefinedAbsolute::numOutputSections + 1);
|
2017-06-23 07:33:04 +08:00
|
|
|
}
|
2019-07-11 13:40:30 +08:00
|
|
|
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
void SectionChunk::applyRelX64(uint8_t *off, uint16_t type, OutputSection *os,
|
|
|
|
uint64_t s, uint64_t p) const {
|
2015-07-08 06:49:21 +08:00
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_AMD64_ADDR32: add32(off, s + config->imageBase); break;
|
|
|
|
case IMAGE_REL_AMD64_ADDR64: add64(off, s + config->imageBase); break;
|
|
|
|
case IMAGE_REL_AMD64_ADDR32NB: add32(off, s); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32: add32(off, s - p - 4); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32_1: add32(off, s - p - 5); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32_2: add32(off, s - p - 6); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32_3: add32(off, s - p - 7); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32_4: add32(off, s - p - 8); break;
|
|
|
|
case IMAGE_REL_AMD64_REL32_5: add32(off, s - p - 9); break;
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
case IMAGE_REL_AMD64_SECTION: applySecIdx(off, os); break;
|
|
|
|
case IMAGE_REL_AMD64_SECREL: applySecRel(this, off, os, s); break;
|
2015-07-08 06:49:21 +08:00
|
|
|
default:
|
2018-08-22 19:34:58 +08:00
|
|
|
error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +
|
2018-06-07 08:50:03 +08:00
|
|
|
toString(file));
|
2015-07-08 06:49:21 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
void SectionChunk::applyRelX86(uint8_t *off, uint16_t type, OutputSection *os,
|
|
|
|
uint64_t s, uint64_t p) const {
|
2015-07-08 09:45:29 +08:00
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_I386_ABSOLUTE: break;
|
|
|
|
case IMAGE_REL_I386_DIR32: add32(off, s + config->imageBase); break;
|
|
|
|
case IMAGE_REL_I386_DIR32NB: add32(off, s); break;
|
|
|
|
case IMAGE_REL_I386_REL32: add32(off, s - p - 4); break;
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
case IMAGE_REL_I386_SECTION: applySecIdx(off, os); break;
|
|
|
|
case IMAGE_REL_I386_SECREL: applySecRel(this, off, os, s); break;
|
2015-07-08 09:45:29 +08:00
|
|
|
default:
|
2018-08-22 19:34:58 +08:00
|
|
|
error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +
|
2018-06-07 08:50:03 +08:00
|
|
|
toString(file));
|
2015-07-08 09:45:29 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-08-06 03:40:07 +08:00
|
|
|
static void applyMOV(uint8_t *off, uint16_t v) {
|
2016-08-06 02:20:31 +08:00
|
|
|
write16le(off, (read16le(off) & 0xfbf0) | ((v & 0x800) >> 1) | ((v >> 12) & 0xf));
|
|
|
|
write16le(off + 2, (read16le(off + 2) & 0x8f00) | ((v & 0x700) << 4) | (v & 0xff));
|
|
|
|
}
|
|
|
|
|
2018-08-27 14:04:36 +08:00
|
|
|
static uint16_t readMOV(uint8_t *off, bool movt) {
|
2018-02-18 07:37:26 +08:00
|
|
|
uint16_t op1 = read16le(off);
|
2018-08-27 14:04:36 +08:00
|
|
|
if ((op1 & 0xfbf0) != (movt ? 0xf2c0 : 0xf240))
|
|
|
|
error("unexpected instruction in " + Twine(movt ? "MOVT" : "MOVW") +
|
|
|
|
" instruction in MOV32T relocation");
|
2018-02-18 07:37:26 +08:00
|
|
|
uint16_t op2 = read16le(off + 2);
|
2018-08-27 14:04:36 +08:00
|
|
|
if ((op2 & 0x8000) != 0)
|
|
|
|
error("unexpected instruction in " + Twine(movt ? "MOVT" : "MOVW") +
|
|
|
|
" instruction in MOV32T relocation");
|
2018-02-18 07:37:26 +08:00
|
|
|
return (op2 & 0x00ff) | ((op2 >> 4) & 0x0700) | ((op1 << 1) & 0x0800) |
|
|
|
|
((op1 & 0x000f) << 12);
|
2015-08-06 03:40:07 +08:00
|
|
|
}
|
|
|
|
|
2017-07-26 04:00:37 +08:00
|
|
|
void applyMOV32T(uint8_t *off, uint32_t v) {
|
2018-08-27 14:04:36 +08:00
|
|
|
uint16_t immW = readMOV(off, false); // read MOVW operand
|
|
|
|
uint16_t immT = readMOV(off + 4, true); // read MOVT operand
|
2016-08-06 02:20:31 +08:00
|
|
|
uint32_t imm = immW | (immT << 16);
|
|
|
|
v += imm; // add the immediate offset
|
2015-08-06 03:40:07 +08:00
|
|
|
applyMOV(off, v); // set MOVW operand
|
|
|
|
applyMOV(off + 4, v >> 16); // set MOVT operand
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applyBranch20T(uint8_t *off, int32_t v) {
|
2017-12-14 16:56:36 +08:00
|
|
|
if (!isInt<21>(v))
|
2018-08-22 19:34:58 +08:00
|
|
|
error("relocation out of range");
|
2015-08-06 03:40:07 +08:00
|
|
|
uint32_t s = v < 0 ? 1 : 0;
|
|
|
|
uint32_t j1 = (v >> 19) & 1;
|
|
|
|
uint32_t j2 = (v >> 18) & 1;
|
|
|
|
or16(off, (s << 10) | ((v >> 12) & 0x3f));
|
|
|
|
or16(off + 2, (j1 << 13) | (j2 << 11) | ((v >> 1) & 0x7ff));
|
2015-07-25 11:03:46 +08:00
|
|
|
}
|
|
|
|
|
2017-07-26 04:00:37 +08:00
|
|
|
void applyBranch24T(uint8_t *off, int32_t v) {
|
2016-08-06 01:33:24 +08:00
|
|
|
if (!isInt<25>(v))
|
2018-08-22 19:34:58 +08:00
|
|
|
error("relocation out of range");
|
2015-07-25 11:19:34 +08:00
|
|
|
uint32_t s = v < 0 ? 1 : 0;
|
|
|
|
uint32_t j1 = ((~v >> 23) & 1) ^ s;
|
|
|
|
uint32_t j2 = ((~v >> 22) & 1) ^ s;
|
2015-08-06 03:40:07 +08:00
|
|
|
or16(off, (s << 10) | ((v >> 12) & 0x3ff));
|
2016-08-06 01:28:21 +08:00
|
|
|
// Clear out the J1 and J2 bits which may be set.
|
|
|
|
write16le(off + 2, (read16le(off + 2) & 0xd000) | (j1 << 13) | (j2 << 11) | ((v >> 1) & 0x7ff));
|
2015-07-25 11:19:34 +08:00
|
|
|
}
|
|
|
|
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
void SectionChunk::applyRelARM(uint8_t *off, uint16_t type, OutputSection *os,
|
|
|
|
uint64_t s, uint64_t p) const {
|
2015-07-30 03:25:00 +08:00
|
|
|
// Pointer to thumb code must have the LSB set.
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
uint64_t sx = s;
|
2018-04-20 05:48:37 +08:00
|
|
|
if (os && (os->header.Characteristics & IMAGE_SCN_MEM_EXECUTE))
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
sx |= 1;
|
2015-07-25 11:03:46 +08:00
|
|
|
switch (type) {
|
[COFF] Allow debug info to relocate against discarded symbols
Summary:
In order to do this without switching on the symbol kind multiple times,
I created Defined::getChunkAndOffset and use that instead of
SymbolBody::getRVA in the inner relocation loop.
Now we get the symbol's chunk before switching over relocation types, so
we can test if it has been discarded outside the inner relocation type
switch. This also simplifies application of section relative
relocations. Previously we would switch on symbol kind to compute the
RVA, then the relocation type, and then the symbol kind again to get the
output section so we could subtract that from the symbol RVA. Now we
*always* have an OutputSection, so applying SECREL and SECTION
relocations isn't as much of a special case.
I'm still not quite happy with the cleanliness of this code. I'm not
sure what offsets and bases we should be using during the relocation
processing loop: VA, RVA, or OutputSectionOffset.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: majnemer, inglorion, llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D34650
llvm-svn: 306566
2017-06-29 01:06:35 +08:00
|
|
|
case IMAGE_REL_ARM_ADDR32: add32(off, sx + config->imageBase); break;
|
|
|
|
case IMAGE_REL_ARM_ADDR32NB: add32(off, sx); break;
|
|
|
|
case IMAGE_REL_ARM_MOV32T: applyMOV32T(off, sx + config->imageBase); break;
|
|
|
|
case IMAGE_REL_ARM_BRANCH20T: applyBranch20T(off, sx - p - 4); break;
|
|
|
|
case IMAGE_REL_ARM_BRANCH24T: applyBranch24T(off, sx - p - 4); break;
|
|
|
|
case IMAGE_REL_ARM_BLX23T: applyBranch24T(off, sx - p - 4); break;
|
|
|
|
case IMAGE_REL_ARM_SECTION: applySecIdx(off, os); break;
|
|
|
|
case IMAGE_REL_ARM_SECREL: applySecRel(this, off, os, s); break;
|
2019-01-28 03:57:50 +08:00
|
|
|
case IMAGE_REL_ARM_REL32: add32(off, sx - p - 4); break;
|
2015-07-25 11:03:46 +08:00
|
|
|
default:
|
2018-08-22 19:34:58 +08:00
|
|
|
error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +
|
2018-06-07 08:50:03 +08:00
|
|
|
toString(file));
|
2015-07-25 11:03:46 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-27 04:51:47 +08:00
|
|
|
// Interpret the existing immediate value as a byte offset to the
|
|
|
|
// target symbol, then update the instruction with the immediate as
|
|
|
|
// the page offset from the current instruction to the target.
|
2018-09-18 15:22:01 +08:00
|
|
|
void applyArm64Addr(uint8_t *off, uint64_t s, uint64_t p, int shift) {
|
2017-07-27 04:51:47 +08:00
|
|
|
uint32_t orig = read32le(off);
|
|
|
|
uint64_t imm = ((orig >> 29) & 0x3) | ((orig >> 3) & 0x1FFFFC);
|
|
|
|
s += imm;
|
2018-05-04 14:06:27 +08:00
|
|
|
imm = (s >> shift) - (p >> shift);
|
2017-07-11 15:22:44 +08:00
|
|
|
uint32_t immLo = (imm & 0x3) << 29;
|
|
|
|
uint32_t immHi = (imm & 0x1FFFFC) << 3;
|
|
|
|
uint64_t mask = (0x3 << 29) | (0x1FFFFC << 3);
|
2017-07-27 04:51:47 +08:00
|
|
|
write32le(off, (orig & ~mask) | immLo | immHi);
|
2017-07-11 15:22:44 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Update the immediate field in a AARCH64 ldr, str, and add instruction.
|
2017-07-27 04:51:47 +08:00
|
|
|
// Optionally limit the range of the written immediate by one or more bits
|
2019-07-16 16:26:38 +08:00
|
|
|
// (rangeLimit).
|
2018-09-18 15:22:01 +08:00
|
|
|
void applyArm64Imm(uint8_t *off, uint64_t imm, uint32_t rangeLimit) {
|
2017-07-11 15:22:44 +08:00
|
|
|
uint32_t orig = read32le(off);
|
|
|
|
imm += (orig >> 10) & 0xFFF;
|
|
|
|
orig &= ~(0xFFF << 10);
|
2017-07-27 04:51:47 +08:00
|
|
|
write32le(off, orig | ((imm & (0xFFF >> rangeLimit)) << 10));
|
2017-07-11 15:22:44 +08:00
|
|
|
}
|
|
|
|
|
2017-07-27 04:51:47 +08:00
|
|
|
// Add the 12 bit page offset to the existing immediate.
|
|
|
|
// Ldr/str instructions store the opcode immediate scaled
|
|
|
|
// by the load/store size (giving a larger range for larger
|
|
|
|
// loads/stores). The immediate is always (both before and after
|
|
|
|
// fixing up the relocation) stored scaled similarly.
|
|
|
|
// Even if larger loads/stores have a larger range, limit the
|
|
|
|
// effective offset to 12 bit, since it is intended to be a
|
|
|
|
// page offset.
|
2017-07-11 15:22:44 +08:00
|
|
|
static void applyArm64Ldr(uint8_t *off, uint64_t imm) {
|
2017-07-21 00:48:33 +08:00
|
|
|
uint32_t orig = read32le(off);
|
|
|
|
uint32_t size = orig >> 30;
|
|
|
|
// 0x04000000 indicates SIMD/FP registers
|
|
|
|
// 0x00800000 indicates 128 bit
|
|
|
|
if ((orig & 0x4800000) == 0x4800000)
|
|
|
|
size += 4;
|
2017-07-20 13:49:54 +08:00
|
|
|
if ((imm & ((1 << size) - 1)) != 0)
|
2018-08-22 19:34:58 +08:00
|
|
|
error("misaligned ldr/str offset");
|
2017-07-27 04:51:47 +08:00
|
|
|
applyArm64Imm(off, imm >> size, size);
|
2017-07-11 15:22:44 +08:00
|
|
|
}
|
|
|
|
|
2018-02-18 04:28:15 +08:00
|
|
|
static void applySecRelLow12A(const SectionChunk *sec, uint8_t *off,
|
|
|
|
OutputSection *os, uint64_t s) {
|
|
|
|
if (checkSecRel(sec, os))
|
|
|
|
applyArm64Imm(off, (s - os->getRVA()) & 0xfff, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applySecRelHigh12A(const SectionChunk *sec, uint8_t *off,
|
|
|
|
OutputSection *os, uint64_t s) {
|
|
|
|
if (!checkSecRel(sec, os))
|
|
|
|
return;
|
|
|
|
uint64_t secRel = (s - os->getRVA()) >> 12;
|
|
|
|
if (0xfff < secRel) {
|
2018-02-17 06:02:38 +08:00
|
|
|
error("overflow in SECREL_HIGH12A relocation in section: " +
|
|
|
|
sec->getSectionName());
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
applyArm64Imm(off, secRel & 0xfff, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applySecRelLdr(const SectionChunk *sec, uint8_t *off,
|
|
|
|
OutputSection *os, uint64_t s) {
|
2018-02-18 04:28:15 +08:00
|
|
|
if (checkSecRel(sec, os))
|
|
|
|
applyArm64Ldr(off, (s - os->getRVA()) & 0xfff);
|
2018-02-17 06:02:38 +08:00
|
|
|
}
|
|
|
|
|
2018-09-18 15:22:01 +08:00
|
|
|
void applyArm64Branch26(uint8_t *off, int64_t v) {
|
2018-05-04 14:06:27 +08:00
|
|
|
if (!isInt<28>(v))
|
2018-08-22 19:34:58 +08:00
|
|
|
error("relocation out of range");
|
2018-05-04 14:06:27 +08:00
|
|
|
or32(off, (v & 0x0FFFFFFC) >> 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applyArm64Branch19(uint8_t *off, int64_t v) {
|
|
|
|
if (!isInt<21>(v))
|
2018-08-22 19:34:58 +08:00
|
|
|
error("relocation out of range");
|
2018-05-04 14:06:27 +08:00
|
|
|
or32(off, (v & 0x001FFFFC) << 3);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void applyArm64Branch14(uint8_t *off, int64_t v) {
|
|
|
|
if (!isInt<16>(v))
|
2018-08-22 19:34:58 +08:00
|
|
|
error("relocation out of range");
|
2018-05-04 14:06:27 +08:00
|
|
|
or32(off, (v & 0x0000FFFC) << 3);
|
|
|
|
}
|
2019-07-11 13:40:30 +08:00
|
|
|
|
2017-07-11 15:22:44 +08:00
|
|
|
void SectionChunk::applyRelARM64(uint8_t *off, uint16_t type, OutputSection *os,
|
|
|
|
uint64_t s, uint64_t p) const {
|
|
|
|
switch (type) {
|
2018-05-04 14:06:27 +08:00
|
|
|
case IMAGE_REL_ARM64_PAGEBASE_REL21: applyArm64Addr(off, s, p, 12); break;
|
|
|
|
case IMAGE_REL_ARM64_REL21: applyArm64Addr(off, s, p, 0); break;
|
2017-07-27 04:51:47 +08:00
|
|
|
case IMAGE_REL_ARM64_PAGEOFFSET_12A: applyArm64Imm(off, s & 0xfff, 0); break;
|
2017-07-11 15:22:44 +08:00
|
|
|
case IMAGE_REL_ARM64_PAGEOFFSET_12L: applyArm64Ldr(off, s & 0xfff); break;
|
2018-05-04 14:06:27 +08:00
|
|
|
case IMAGE_REL_ARM64_BRANCH26: applyArm64Branch26(off, s - p); break;
|
|
|
|
case IMAGE_REL_ARM64_BRANCH19: applyArm64Branch19(off, s - p); break;
|
|
|
|
case IMAGE_REL_ARM64_BRANCH14: applyArm64Branch14(off, s - p); break;
|
2017-07-11 15:22:44 +08:00
|
|
|
case IMAGE_REL_ARM64_ADDR32: add32(off, s + config->imageBase); break;
|
2017-10-12 13:37:06 +08:00
|
|
|
case IMAGE_REL_ARM64_ADDR32NB: add32(off, s); break;
|
2017-07-11 15:22:44 +08:00
|
|
|
case IMAGE_REL_ARM64_ADDR64: add64(off, s + config->imageBase); break;
|
2017-11-08 15:31:50 +08:00
|
|
|
case IMAGE_REL_ARM64_SECREL: applySecRel(this, off, os, s); break;
|
2018-02-18 04:28:15 +08:00
|
|
|
case IMAGE_REL_ARM64_SECREL_LOW12A: applySecRelLow12A(this, off, os, s); break;
|
|
|
|
case IMAGE_REL_ARM64_SECREL_HIGH12A: applySecRelHigh12A(this, off, os, s); break;
|
2018-02-17 06:02:38 +08:00
|
|
|
case IMAGE_REL_ARM64_SECREL_LOW12L: applySecRelLdr(this, off, os, s); break;
|
2018-05-04 14:06:27 +08:00
|
|
|
case IMAGE_REL_ARM64_SECTION: applySecIdx(off, os); break;
|
2019-01-28 03:57:50 +08:00
|
|
|
case IMAGE_REL_ARM64_REL32: add32(off, s - p - 4); break;
|
2017-07-11 15:22:44 +08:00
|
|
|
default:
|
2018-08-22 19:34:58 +08:00
|
|
|
error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +
|
2018-06-07 08:50:03 +08:00
|
|
|
toString(file));
|
2017-07-11 15:22:44 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-14 02:30:31 +08:00
|
|
|
static void maybeReportRelocationToDiscarded(const SectionChunk *fromChunk,
|
|
|
|
Defined *sym,
|
|
|
|
const coff_relocation &rel) {
|
|
|
|
// Don't report these errors when the relocation comes from a debug info
|
|
|
|
// section or in mingw mode. MinGW mode object files (built by GCC) can
|
|
|
|
// have leftover sections with relocations against discarded comdat
|
|
|
|
// sections. Such sections are left as is, with relocations untouched.
|
|
|
|
if (fromChunk->isCodeView() || fromChunk->isDWARF() || config->mingw)
|
|
|
|
return;
|
|
|
|
|
|
|
|
// Get the name of the symbol. If it's null, it was discarded early, so we
|
|
|
|
// have to go back to the object file.
|
|
|
|
ObjFile *file = fromChunk->file;
|
|
|
|
StringRef name;
|
|
|
|
if (sym) {
|
|
|
|
name = sym->getName();
|
|
|
|
} else {
|
|
|
|
COFFSymbolRef coffSym =
|
|
|
|
check(file->getCOFFObj()->getSymbol(rel.SymbolTableIndex));
|
2020-05-09 01:41:05 +08:00
|
|
|
name = check(file->getCOFFObj()->getSymbolName(coffSym));
|
2018-11-14 02:30:31 +08:00
|
|
|
}
|
|
|
|
|
2019-06-25 17:55:55 +08:00
|
|
|
std::vector<std::string> symbolLocations =
|
|
|
|
getSymbolLocations(file, rel.SymbolTableIndex);
|
|
|
|
|
|
|
|
std::string out;
|
|
|
|
llvm::raw_string_ostream os(out);
|
|
|
|
os << "relocation against symbol in discarded section: " + name;
|
|
|
|
for (const std::string &s : symbolLocations)
|
|
|
|
os << s;
|
|
|
|
error(os.str());
|
2018-11-14 02:30:31 +08:00
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void SectionChunk::writeTo(uint8_t *buf) const {
|
2019-07-10 17:10:01 +08:00
|
|
|
if (!hasData)
|
2015-05-29 04:04:51 +08:00
|
|
|
return;
|
2015-06-06 12:07:39 +08:00
|
|
|
// Copy section contents from source object file to output file.
|
2015-06-26 01:56:36 +08:00
|
|
|
ArrayRef<uint8_t> a = getContents();
|
2018-04-21 06:16:09 +08:00
|
|
|
if (!a.empty())
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, a.data(), a.size());
|
2015-06-06 12:07:39 +08:00
|
|
|
|
|
|
|
// Apply relocations.
|
2017-07-14 04:29:59 +08:00
|
|
|
size_t inputSize = getSize();
|
2021-01-21 03:00:58 +08:00
|
|
|
for (const coff_relocation &rel : getRelocs()) {
|
2017-07-14 04:29:59 +08:00
|
|
|
// Check for an invalid relocation offset. This check isn't perfect, because
|
|
|
|
// we don't have the relocation size, which is only known after checking the
|
|
|
|
// machine and relocation type. As a result, a relocation may overwrite the
|
|
|
|
// beginning of the following input section.
|
2018-08-22 19:34:58 +08:00
|
|
|
if (rel.VirtualAddress >= inputSize) {
|
|
|
|
error("relocation points beyond the end of its parent section");
|
|
|
|
continue;
|
|
|
|
}
|
2017-07-14 04:29:59 +08:00
|
|
|
|
2021-01-29 05:17:27 +08:00
|
|
|
uint8_t *off = buf + rel.VirtualAddress;
|
|
|
|
|
|
|
|
auto *sym =
|
|
|
|
dyn_cast_or_null<Defined>(file->getSymbol(rel.SymbolTableIndex));
|
|
|
|
|
|
|
|
// Get the output section of the symbol for this relocation. The output
|
|
|
|
// section is needed to compute SECREL and SECTION relocations used in debug
|
|
|
|
// info.
|
|
|
|
Chunk *c = sym ? sym->getChunk() : nullptr;
|
|
|
|
OutputSection *os = c ? c->getOutputSection() : nullptr;
|
|
|
|
|
|
|
|
// Skip the relocation if it refers to a discarded section, and diagnose it
|
|
|
|
// as an error if appropriate. If a symbol was discarded early, it may be
|
|
|
|
// null. If it was discarded late, the output section will be null, unless
|
|
|
|
// it was an absolute or synthetic symbol.
|
|
|
|
if (!sym ||
|
|
|
|
(!os && !isa<DefinedAbsolute>(sym) && !isa<DefinedSynthetic>(sym))) {
|
|
|
|
maybeReportRelocationToDiscarded(this, sym, rel);
|
|
|
|
continue;
|
|
|
|
}
|
2021-01-21 03:46:05 +08:00
|
|
|
|
2021-01-29 05:17:27 +08:00
|
|
|
uint64_t s = sym->getRVA();
|
2021-01-21 03:46:05 +08:00
|
|
|
|
2021-01-29 05:17:27 +08:00
|
|
|
// Compute the RVA of the relocation for relative relocations.
|
|
|
|
uint64_t p = rva + rel.VirtualAddress;
|
|
|
|
switch (config->machine) {
|
|
|
|
case AMD64:
|
|
|
|
applyRelX64(off, rel.Type, os, s, p);
|
|
|
|
break;
|
|
|
|
case I386:
|
|
|
|
applyRelX86(off, rel.Type, os, s, p);
|
2021-01-20 03:20:23 +08:00
|
|
|
break;
|
2021-01-29 05:17:27 +08:00
|
|
|
case ARMNT:
|
|
|
|
applyRelARM(off, rel.Type, os, s, p);
|
|
|
|
break;
|
|
|
|
case ARM64:
|
|
|
|
applyRelARM64(off, rel.Type, os, s, p);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
llvm_unreachable("unknown machine type");
|
|
|
|
}
|
2015-06-25 08:33:38 +08:00
|
|
|
}
|
2015-05-29 03:09:30 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void SectionChunk::addAssociative(SectionChunk *child) {
|
[COFF] Reduce the size of Chunk and SectionChunk, NFC
Summary:
Reorder the fields in both to use padding more efficiently, and add more
comments on the purpose of the fields.
Replace `std::vector<SectionChunk*> AssociativeChildren` with a
singly-linked list. This avoids the separate vector allocation to list
associative children, and shrinks the 3 pointers used for the typically
empty vector down to 1.
In the end, this reduces the sum of heap allocations used to link
browser_tests.exe with NO PDB by 13.10%, going from 2,248,728 KB to
1,954,071 KB of heap. These numbers exclude memory mapped files, which
are of course a significant factor in LLD's memory usage.
Reviewers: ruiu, mstorsjo, aganea
Subscribers: jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59797
llvm-svn: 357535
2019-04-03 06:11:58 +08:00
|
|
|
// Insert this child at the head of the list.
|
|
|
|
assert(child->assocChildren == nullptr &&
|
|
|
|
"associated sections cannot have their own associated children");
|
|
|
|
child->assocChildren = assocChildren;
|
|
|
|
assocChildren = child;
|
2015-05-29 03:09:30 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 09:44:32 +08:00
|
|
|
static uint8_t getBaserelType(const coff_relocation &rel) {
|
2015-07-26 05:54:50 +08:00
|
|
|
switch (config->machine) {
|
|
|
|
case AMD64:
|
2015-07-25 09:44:32 +08:00
|
|
|
if (rel.Type == IMAGE_REL_AMD64_ADDR64)
|
|
|
|
return IMAGE_REL_BASED_DIR64;
|
|
|
|
return IMAGE_REL_BASED_ABSOLUTE;
|
2015-07-26 05:54:50 +08:00
|
|
|
case I386:
|
2015-07-25 09:44:32 +08:00
|
|
|
if (rel.Type == IMAGE_REL_I386_DIR32)
|
|
|
|
return IMAGE_REL_BASED_HIGHLOW;
|
|
|
|
return IMAGE_REL_BASED_ABSOLUTE;
|
2015-07-26 05:54:50 +08:00
|
|
|
case ARMNT:
|
2015-07-25 11:03:46 +08:00
|
|
|
if (rel.Type == IMAGE_REL_ARM_ADDR32)
|
|
|
|
return IMAGE_REL_BASED_HIGHLOW;
|
|
|
|
if (rel.Type == IMAGE_REL_ARM_MOV32T)
|
|
|
|
return IMAGE_REL_BASED_ARM_MOV32T;
|
|
|
|
return IMAGE_REL_BASED_ABSOLUTE;
|
2017-07-11 15:22:44 +08:00
|
|
|
case ARM64:
|
|
|
|
if (rel.Type == IMAGE_REL_ARM64_ADDR64)
|
|
|
|
return IMAGE_REL_BASED_DIR64;
|
|
|
|
return IMAGE_REL_BASED_ABSOLUTE;
|
2015-07-10 04:36:59 +08:00
|
|
|
default:
|
|
|
|
llvm_unreachable("unknown machine type");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-06-15 09:23:58 +08:00
|
|
|
// Windows-specific.
|
2015-07-10 04:36:59 +08:00
|
|
|
// Collect all locations that contain absolute addresses, which need to be
|
|
|
|
// fixed by the loader if load-time relocation is needed.
|
2015-06-15 09:23:58 +08:00
|
|
|
// Only called when base relocation is enabled.
|
2015-07-25 09:44:32 +08:00
|
|
|
void SectionChunk::getBaserels(std::vector<Baserel> *res) {
|
2021-01-21 03:00:58 +08:00
|
|
|
for (const coff_relocation &rel : getRelocs()) {
|
2015-07-25 09:44:32 +08:00
|
|
|
uint8_t ty = getBaserelType(rel);
|
|
|
|
if (ty == IMAGE_REL_BASED_ABSOLUTE)
|
2015-06-15 09:23:58 +08:00
|
|
|
continue;
|
2019-03-29 02:30:03 +08:00
|
|
|
Symbol *target = file->getSymbol(rel.SymbolTableIndex);
|
2017-11-21 03:37:07 +08:00
|
|
|
if (!target || isa<DefinedAbsolute>(target))
|
2015-06-15 09:23:58 +08:00
|
|
|
continue;
|
2015-07-25 09:44:32 +08:00
|
|
|
res->emplace_back(rva + rel.VirtualAddress, ty);
|
2015-06-15 09:23:58 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
// MinGW specific.
|
|
|
|
// Check whether a static relocation of type Type can be deferred and
|
|
|
|
// handled at runtime as a pseudo relocation (for references to a module
|
|
|
|
// local variable, which turned out to actually need to be imported from
|
|
|
|
// another DLL) This returns the size the relocation is supposed to update,
|
|
|
|
// in bits, or 0 if the relocation cannot be handled as a runtime pseudo
|
|
|
|
// relocation.
|
|
|
|
static int getRuntimePseudoRelocSize(uint16_t type) {
|
|
|
|
// Relocations that either contain an absolute address, or a plain
|
|
|
|
// relative offset, since the runtime pseudo reloc implementation
|
|
|
|
// adds 8/16/32/64 bit values to a memory address.
|
|
|
|
//
|
|
|
|
// Given a pseudo relocation entry,
|
|
|
|
//
|
|
|
|
// typedef struct {
|
|
|
|
// DWORD sym;
|
|
|
|
// DWORD target;
|
|
|
|
// DWORD flags;
|
|
|
|
// } runtime_pseudo_reloc_item_v2;
|
|
|
|
//
|
|
|
|
// the runtime relocation performs this adjustment:
|
|
|
|
// *(base + .target) += *(base + .sym) - (base + .sym)
|
|
|
|
//
|
|
|
|
// This works for both absolute addresses (IMAGE_REL_*_ADDR32/64,
|
|
|
|
// IMAGE_REL_I386_DIR32, where the memory location initially contains
|
|
|
|
// the address of the IAT slot, and for relative addresses (IMAGE_REL*_REL32),
|
|
|
|
// where the memory location originally contains the relative offset to the
|
|
|
|
// IAT slot.
|
|
|
|
//
|
|
|
|
// This requires the target address to be writable, either directly out of
|
|
|
|
// the image, or temporarily changed at runtime with VirtualProtect.
|
|
|
|
// Since this only operates on direct address values, it doesn't work for
|
|
|
|
// ARM/ARM64 relocations, other than the plain ADDR32/ADDR64 relocations.
|
|
|
|
switch (config->machine) {
|
|
|
|
case AMD64:
|
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_AMD64_ADDR64:
|
|
|
|
return 64;
|
|
|
|
case IMAGE_REL_AMD64_ADDR32:
|
|
|
|
case IMAGE_REL_AMD64_REL32:
|
|
|
|
case IMAGE_REL_AMD64_REL32_1:
|
|
|
|
case IMAGE_REL_AMD64_REL32_2:
|
|
|
|
case IMAGE_REL_AMD64_REL32_3:
|
|
|
|
case IMAGE_REL_AMD64_REL32_4:
|
|
|
|
case IMAGE_REL_AMD64_REL32_5:
|
|
|
|
return 32;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
case I386:
|
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_I386_DIR32:
|
|
|
|
case IMAGE_REL_I386_REL32:
|
|
|
|
return 32;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
case ARMNT:
|
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_ARM_ADDR32:
|
|
|
|
return 32;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
case ARM64:
|
|
|
|
switch (type) {
|
|
|
|
case IMAGE_REL_ARM64_ADDR64:
|
|
|
|
return 64;
|
|
|
|
case IMAGE_REL_ARM64_ADDR32:
|
|
|
|
return 32;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
llvm_unreachable("unknown machine type");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// MinGW specific.
|
|
|
|
// Append information to the provided vector about all relocations that
|
|
|
|
// need to be handled at runtime as runtime pseudo relocations (references
|
|
|
|
// to a module local variable, which turned out to actually need to be
|
|
|
|
// imported from another DLL).
|
|
|
|
void SectionChunk::getRuntimePseudoRelocs(
|
|
|
|
std::vector<RuntimePseudoReloc> &res) {
|
2019-05-04 04:17:14 +08:00
|
|
|
for (const coff_relocation &rel : getRelocs()) {
|
2018-09-26 14:13:39 +08:00
|
|
|
auto *target =
|
|
|
|
dyn_cast_or_null<Defined>(file->getSymbol(rel.SymbolTableIndex));
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
if (!target || !target->isRuntimePseudoReloc)
|
|
|
|
continue;
|
|
|
|
int sizeInBits = getRuntimePseudoRelocSize(rel.Type);
|
|
|
|
if (sizeInBits == 0) {
|
|
|
|
error("unable to automatically import from " + target->getName() +
|
|
|
|
" with relocation type " +
|
|
|
|
file->getCOFFObj()->getRelocationTypeName(rel.Type) + " in " +
|
|
|
|
toString(file));
|
|
|
|
continue;
|
|
|
|
}
|
2019-07-16 16:26:38 +08:00
|
|
|
// sizeInBits is used to initialize the Flags field; currently no
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
// other flags are defined.
|
|
|
|
res.emplace_back(
|
|
|
|
RuntimePseudoReloc(target, this, rel.VirtualAddress, sizeInBits));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-05-29 03:09:30 +08:00
|
|
|
bool SectionChunk::isCOMDAT() const {
|
|
|
|
return header->Characteristics & IMAGE_SCN_LNK_COMDAT;
|
|
|
|
}
|
|
|
|
|
2015-06-26 03:10:58 +08:00
|
|
|
void SectionChunk::printDiscardedMessage() const {
|
2015-09-17 05:30:40 +08:00
|
|
|
// Removed by dead-stripping. If it's removed by ICF, ICF already
|
|
|
|
// printed out the name, so don't repeat that here.
|
2017-11-28 09:30:07 +08:00
|
|
|
if (sym && this == repl)
|
|
|
|
message("Discarded " + sym->getName());
|
2015-05-29 03:09:30 +08:00
|
|
|
}
|
|
|
|
|
2019-05-25 04:25:40 +08:00
|
|
|
StringRef SectionChunk::getDebugName() const {
|
2015-08-21 15:01:10 +08:00
|
|
|
if (sym)
|
|
|
|
return sym->getName();
|
|
|
|
return "";
|
2015-06-24 08:00:52 +08:00
|
|
|
}
|
|
|
|
|
2015-06-26 01:56:36 +08:00
|
|
|
ArrayRef<uint8_t> SectionChunk::getContents() const {
|
|
|
|
ArrayRef<uint8_t> a;
|
2019-05-14 12:22:51 +08:00
|
|
|
cantFail(file->getCOFFObj()->getSectionContents(header, a));
|
2015-06-26 01:56:36 +08:00
|
|
|
return a;
|
|
|
|
}
|
|
|
|
|
2019-02-23 09:46:18 +08:00
|
|
|
ArrayRef<uint8_t> SectionChunk::consumeDebugMagic() {
|
|
|
|
assert(isCodeView());
|
2019-05-04 04:17:14 +08:00
|
|
|
return consumeDebugMagic(getContents(), getSectionName());
|
2019-02-23 09:46:18 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
ArrayRef<uint8_t> SectionChunk::consumeDebugMagic(ArrayRef<uint8_t> data,
|
|
|
|
StringRef sectionName) {
|
|
|
|
if (data.empty())
|
|
|
|
return {};
|
|
|
|
|
|
|
|
// First 4 bytes are section magic.
|
|
|
|
if (data.size() < 4)
|
|
|
|
fatal("the section is too short: " + sectionName);
|
|
|
|
|
|
|
|
if (!sectionName.startswith(".debug$"))
|
|
|
|
fatal("invalid section: " + sectionName);
|
|
|
|
|
2019-06-13 06:22:44 +08:00
|
|
|
uint32_t magic = support::endian::read32le(data.data());
|
|
|
|
uint32_t expectedMagic = sectionName == ".debug$H"
|
2019-02-23 09:46:18 +08:00
|
|
|
? DEBUG_HASHES_SECTION_MAGIC
|
|
|
|
: DEBUG_SECTION_MAGIC;
|
2019-06-13 06:22:44 +08:00
|
|
|
if (magic != expectedMagic) {
|
|
|
|
warn("ignoring section " + sectionName + " with unrecognized magic 0x" +
|
|
|
|
utohexstr(magic));
|
|
|
|
return {};
|
|
|
|
}
|
2019-02-23 09:46:18 +08:00
|
|
|
return data.slice(4);
|
|
|
|
}
|
|
|
|
|
|
|
|
SectionChunk *SectionChunk::findByName(ArrayRef<SectionChunk *> sections,
|
|
|
|
StringRef name) {
|
|
|
|
for (SectionChunk *c : sections)
|
|
|
|
if (c->getSectionName() == name)
|
|
|
|
return c;
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2015-09-22 03:36:51 +08:00
|
|
|
void SectionChunk::replace(SectionChunk *other) {
|
2019-05-23 04:21:52 +08:00
|
|
|
p2Align = std::max(p2Align, other->p2Align);
|
2015-09-26 00:20:24 +08:00
|
|
|
other->repl = repl;
|
2015-09-22 03:36:51 +08:00
|
|
|
other->live = false;
|
2015-06-24 12:36:52 +08:00
|
|
|
}
|
|
|
|
|
2018-10-05 20:56:46 +08:00
|
|
|
uint32_t SectionChunk::getSectionNumber() const {
|
|
|
|
DataRefImpl r;
|
|
|
|
r.p = reinterpret_cast<uintptr_t>(header);
|
|
|
|
SectionRef s(r, file->getCOFFObj());
|
|
|
|
return s.getIndex() + 1;
|
|
|
|
}
|
|
|
|
|
2015-06-08 11:17:07 +08:00
|
|
|
CommonChunk::CommonChunk(const COFFSymbolRef s) : sym(s) {
|
2019-05-23 04:21:52 +08:00
|
|
|
// The value of a common symbol is its size. Align all common symbols smaller
|
|
|
|
// than 32 bytes naturally, i.e. round the size up to the next power of two.
|
2015-06-20 15:25:45 +08:00
|
|
|
// This is what MSVC link.exe does.
|
2019-05-23 04:21:52 +08:00
|
|
|
setAlignment(std::min(32U, uint32_t(PowerOf2Ceil(sym.getValue()))));
|
2019-05-25 04:25:40 +08:00
|
|
|
hasData = false;
|
2017-08-15 03:07:27 +08:00
|
|
|
}
|
|
|
|
|
2018-04-20 04:03:24 +08:00
|
|
|
uint32_t CommonChunk::getOutputCharacteristics() const {
|
2015-05-29 03:09:30 +08:00
|
|
|
return IMAGE_SCN_CNT_UNINITIALIZED_DATA | IMAGE_SCN_MEM_READ |
|
|
|
|
IMAGE_SCN_MEM_WRITE;
|
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void StringChunk::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, str.data(), str.size());
|
|
|
|
buf[str.size()] = '\0';
|
2015-05-29 03:45:43 +08:00
|
|
|
}
|
|
|
|
|
2019-05-29 01:38:04 +08:00
|
|
|
ImportThunkChunkX64::ImportThunkChunkX64(Defined *s) : ImportThunkChunk(s) {
|
2015-06-27 02:28:56 +08:00
|
|
|
// Intel Optimization Manual says that all branch targets
|
|
|
|
// should be 16-byte aligned. MSVC linker does this too.
|
2019-05-23 04:21:52 +08:00
|
|
|
setAlignment(16);
|
2015-06-27 02:28:56 +08:00
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void ImportThunkChunkX64::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, importThunkX86, sizeof(importThunkX86));
|
2015-07-25 09:16:06 +08:00
|
|
|
// The first two bytes is a JMP instruction. Fill its operand.
|
2019-05-10 05:21:22 +08:00
|
|
|
write32le(buf + 2, impSymbol->getRVA() - rva - getSize());
|
2015-07-25 09:16:06 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 09:44:32 +08:00
|
|
|
void ImportThunkChunkX86::getBaserels(std::vector<Baserel> *res) {
|
|
|
|
res->emplace_back(getRVA() + 2);
|
2015-07-15 08:25:38 +08:00
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void ImportThunkChunkX86::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, importThunkX86, sizeof(importThunkX86));
|
2015-06-06 12:07:39 +08:00
|
|
|
// The first two bytes is a JMP instruction. Fill its operand.
|
2019-05-10 05:21:22 +08:00
|
|
|
write32le(buf + 2,
|
2015-08-14 11:30:59 +08:00
|
|
|
impSymbol->getRVA() + config->imageBase);
|
2015-05-29 03:09:30 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 11:39:29 +08:00
|
|
|
void ImportThunkChunkARM::getBaserels(std::vector<Baserel> *res) {
|
|
|
|
res->emplace_back(getRVA(), IMAGE_REL_BASED_ARM_MOV32T);
|
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void ImportThunkChunkARM::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, importThunkARM, sizeof(importThunkARM));
|
2015-07-25 11:39:29 +08:00
|
|
|
// Fix mov.w and mov.t operands.
|
2019-05-10 05:21:22 +08:00
|
|
|
applyMOV32T(buf, impSymbol->getRVA() + config->imageBase);
|
2015-07-25 11:39:29 +08:00
|
|
|
}
|
|
|
|
|
2017-07-11 15:22:44 +08:00
|
|
|
void ImportThunkChunkARM64::writeTo(uint8_t *buf) const {
|
|
|
|
int64_t off = impSymbol->getRVA() & 0xfff;
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, importThunkARM64, sizeof(importThunkARM64));
|
|
|
|
applyArm64Addr(buf, impSymbol->getRVA(), rva, 12);
|
|
|
|
applyArm64Ldr(buf + 4, off);
|
2017-07-11 15:22:44 +08:00
|
|
|
}
|
|
|
|
|
2018-09-25 18:59:29 +08:00
|
|
|
// A Thumb2, PIC, non-interworking range extension thunk.
|
|
|
|
const uint8_t armThunk[] = {
|
|
|
|
0x40, 0xf2, 0x00, 0x0c, // P: movw ip,:lower16:S - (P + (L1-P) + 4)
|
|
|
|
0xc0, 0xf2, 0x00, 0x0c, // movt ip,:upper16:S - (P + (L1-P) + 4)
|
|
|
|
0xe7, 0x44, // L1: add pc, ip
|
|
|
|
};
|
|
|
|
|
2019-02-02 06:08:09 +08:00
|
|
|
size_t RangeExtensionThunkARM::getSize() const {
|
2018-09-25 18:59:29 +08:00
|
|
|
assert(config->machine == ARMNT);
|
|
|
|
return sizeof(armThunk);
|
|
|
|
}
|
|
|
|
|
2019-02-02 06:08:09 +08:00
|
|
|
void RangeExtensionThunkARM::writeTo(uint8_t *buf) const {
|
2018-09-25 18:59:29 +08:00
|
|
|
assert(config->machine == ARMNT);
|
|
|
|
uint64_t offset = target->getRVA() - rva - 12;
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, armThunk, sizeof(armThunk));
|
|
|
|
applyMOV32T(buf, uint32_t(offset));
|
2018-09-25 18:59:29 +08:00
|
|
|
}
|
|
|
|
|
2019-02-02 06:08:09 +08:00
|
|
|
// A position independent ARM64 adrp+add thunk, with a maximum range of
|
|
|
|
// +/- 4 GB, which is enough for any PE-COFF.
|
|
|
|
const uint8_t arm64Thunk[] = {
|
|
|
|
0x10, 0x00, 0x00, 0x90, // adrp x16, Dest
|
|
|
|
0x10, 0x02, 0x00, 0x91, // add x16, x16, :lo12:Dest
|
|
|
|
0x00, 0x02, 0x1f, 0xd6, // br x16
|
|
|
|
};
|
|
|
|
|
|
|
|
size_t RangeExtensionThunkARM64::getSize() const {
|
|
|
|
assert(config->machine == ARM64);
|
|
|
|
return sizeof(arm64Thunk);
|
|
|
|
}
|
|
|
|
|
|
|
|
void RangeExtensionThunkARM64::writeTo(uint8_t *buf) const {
|
|
|
|
assert(config->machine == ARM64);
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, arm64Thunk, sizeof(arm64Thunk));
|
|
|
|
applyArm64Addr(buf + 0, target->getRVA(), rva, 12);
|
|
|
|
applyArm64Imm(buf + 4, target->getRVA() & 0xfff, 0);
|
2019-02-02 06:08:09 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 09:44:32 +08:00
|
|
|
void LocalImportChunk::getBaserels(std::vector<Baserel> *res) {
|
|
|
|
res->emplace_back(getRVA());
|
2015-07-03 04:33:50 +08:00
|
|
|
}
|
|
|
|
|
2018-10-12 01:45:58 +08:00
|
|
|
size_t LocalImportChunk::getSize() const { return config->wordsize; }
|
2015-07-10 05:15:58 +08:00
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void LocalImportChunk::writeTo(uint8_t *buf) const {
|
2015-07-10 05:15:58 +08:00
|
|
|
if (config->is64()) {
|
2019-05-10 05:21:22 +08:00
|
|
|
write64le(buf, sym->getRVA() + config->imageBase);
|
2015-07-10 05:15:58 +08:00
|
|
|
} else {
|
2019-05-10 05:21:22 +08:00
|
|
|
write32le(buf, sym->getRVA() + config->imageBase);
|
2015-07-10 05:15:58 +08:00
|
|
|
}
|
2015-07-03 04:33:50 +08:00
|
|
|
}
|
|
|
|
|
2018-02-06 09:58:26 +08:00
|
|
|
void RVATableChunk::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
ulittle32_t *begin = reinterpret_cast<ulittle32_t *>(buf);
|
2015-07-25 07:51:14 +08:00
|
|
|
size_t cnt = 0;
|
2018-02-06 09:58:26 +08:00
|
|
|
for (const ChunkAndOffset &co : syms)
|
|
|
|
begin[cnt++] = co.inputChunk->getRVA() + co.offset;
|
2015-07-25 07:51:14 +08:00
|
|
|
std::sort(begin, begin + cnt);
|
2018-02-06 09:58:26 +08:00
|
|
|
assert(std::unique(begin, begin + cnt) == begin + cnt &&
|
|
|
|
"RVA tables should be de-duplicated");
|
2015-07-25 07:51:14 +08:00
|
|
|
}
|
|
|
|
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
// MinGW specific, for the "automatic import of variables from DLLs" feature.
|
|
|
|
size_t PseudoRelocTableChunk::getSize() const {
|
|
|
|
if (relocs.empty())
|
|
|
|
return 0;
|
|
|
|
return 12 + 12 * relocs.size();
|
|
|
|
}
|
|
|
|
|
|
|
|
// MinGW specific.
|
|
|
|
void PseudoRelocTableChunk::writeTo(uint8_t *buf) const {
|
|
|
|
if (relocs.empty())
|
|
|
|
return;
|
|
|
|
|
2019-05-10 05:21:22 +08:00
|
|
|
ulittle32_t *table = reinterpret_cast<ulittle32_t *>(buf);
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
// This is the list header, to signal the runtime pseudo relocation v2
|
|
|
|
// format.
|
|
|
|
table[0] = 0;
|
|
|
|
table[1] = 0;
|
|
|
|
table[2] = 1;
|
2019-07-11 13:40:30 +08:00
|
|
|
|
[COFF] Support MinGW automatic dllimport of data
Normally, in order to reference exported data symbols from a different
DLL, the declarations need to have the dllimport attribute, in order to
use the __imp_<var> symbol (which contains an address to the actual
variable) instead of the variable itself directly. This isn't an issue
in the same way for functions, since any reference to the function without
the dllimport attribute will end up as a reference to a thunk which loads
the actual target function from the import address table (IAT).
GNU ld, in MinGW environments, supports automatically importing data
symbols from DLLs, even if the references didn't have the appropriate
dllimport attribute. Since the PE/COFF format doesn't support the kind
of relocations that this would require, the MinGW's CRT startup code
has an custom framework of their own for manually fixing the missing
relocations once module is loaded and the target addresses in the IAT
are known.
For this to work, the linker (originall in GNU ld) creates a list of
remaining references needing fixup, which the runtime processes on
startup before handing over control to user code.
While this feature is rather controversial, it's one of the main features
allowing unix style libraries to be used on windows without any extra
porting effort.
Some sort of automatic fixing of data imports is also necessary for the
itanium C++ ABI on windows (as clang implements it right now) for importing
vtable pointers in certain cases, see D43184 for some discussion on that.
The runtime pseudo relocation handler supports 8/16/32/64 bit addresses,
either PC relative references (like IMAGE_REL_*_REL32*) or absolute
references (IMAGE_REL_AMD64_ADDR32, IMAGE_REL_AMD64_ADDR32,
IMAGE_REL_I386_DIR32). On linking, the relocation is handled as a
relocation against the corresponding IAT slot. For the absolute references,
a normal base relocation is created, to update the embedded address
in case the image is loaded at a different address.
The list of runtime pseudo relocations contains the RVA of the
imported symbol (the IAT slot), the RVA of the location the relocation
should be applied to, and a size of the memory location. When the
relocations are fixed at runtime, the difference between the actual
IAT slot value and the IAT slot address is added to the reference,
doing the right thing for both absolute and relative references.
With this patch alone, things work fine for i386 binaries, and mostly
for x86_64 binaries, with feature parity with GNU ld. Despite this,
there are a few gotchas:
- References to data from within code works fine on both x86 architectures,
since their relocations consist of plain 32 or 64 bit absolute/relative
references. On ARM and AArch64, references to data doesn't consist of
a plain 32 or 64 bit embedded address or offset in the code. On ARMNT,
it's usually a MOVW+MOVT instruction pair represented by a
IMAGE_REL_ARM_MOV32T relocation, each instruction containing 16 bit of
the target address), on AArch64, it's usually an ADRP+ADD/LDR/STR
instruction pair with an even more complex encoding, storing a PC
relative address (with a range of +/- 4 GB). This could theoretically
be remedied by extending the runtime pseudo relocation handler with new
relocation types, to support these instruction encodings. This isn't an
issue for GCC/GNU ld since they don't support windows on ARMNT/AArch64.
- For x86_64, if references in code are encoded as 32 bit PC relative
offsets, the runtime relocation will fail if the target turns out to be
out of range for a 32 bit offset.
- Fixing up the relocations at runtime requires making sections writable
if necessary, with the VirtualProtect function. In Windows Store/UWP apps,
this function is forbidden.
These limitations are addressed by a few later patches in lld and
llvm.
Differential Revision: https://reviews.llvm.org/D50917
llvm-svn: 340726
2018-08-27 16:43:31 +08:00
|
|
|
size_t idx = 3;
|
|
|
|
for (const RuntimePseudoReloc &rpr : relocs) {
|
|
|
|
table[idx + 0] = rpr.sym->getRVA();
|
|
|
|
table[idx + 1] = rpr.target->getRVA() + rpr.targetOffset;
|
|
|
|
table[idx + 2] = rpr.flags;
|
|
|
|
idx += 3;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-04-25 11:31:10 +08:00
|
|
|
// Windows-specific. This class represents a block in .reloc section.
|
|
|
|
// The format is described here.
|
|
|
|
//
|
|
|
|
// On Windows, each DLL is linked against a fixed base address and
|
|
|
|
// usually loaded to that address. However, if there's already another
|
|
|
|
// DLL that overlaps, the loader has to relocate it. To do that, DLLs
|
|
|
|
// contain .reloc sections which contain offsets that need to be fixed
|
2017-04-27 04:20:05 +08:00
|
|
|
// up at runtime. If the loader finds that a DLL cannot be loaded to its
|
2017-04-25 11:31:10 +08:00
|
|
|
// desired base address, it loads it to somewhere else, and add <actual
|
|
|
|
// base address> - <desired base address> to each offset that is
|
2017-04-27 04:20:05 +08:00
|
|
|
// specified by the .reloc section. In ELF terms, .reloc sections
|
|
|
|
// contain relative relocations in REL format (as opposed to RELA.)
|
2017-04-25 11:31:10 +08:00
|
|
|
//
|
2017-04-27 04:20:05 +08:00
|
|
|
// This already significantly reduces the size of relocations compared
|
|
|
|
// to ELF .rel.dyn, but Windows does more to reduce it (probably because
|
|
|
|
// it was invented for PCs in the late '80s or early '90s.) Offsets in
|
|
|
|
// .reloc are grouped by page where the page size is 12 bits, and
|
|
|
|
// offsets sharing the same page address are stored consecutively to
|
|
|
|
// represent them with less space. This is very similar to the page
|
|
|
|
// table which is grouped by (multiple stages of) pages.
|
2017-04-25 11:31:10 +08:00
|
|
|
//
|
2017-04-27 04:20:05 +08:00
|
|
|
// For example, let's say we have 0x00030, 0x00500, 0x00700, 0x00A00,
|
|
|
|
// 0x20004, and 0x20008 in a .reloc section for x64. The uppermost 4
|
|
|
|
// bits have a type IMAGE_REL_BASED_DIR64 or 0xA. In the section, they
|
|
|
|
// are represented like this:
|
2017-04-25 11:31:10 +08:00
|
|
|
//
|
|
|
|
// 0x00000 -- page address (4 bytes)
|
|
|
|
// 16 -- size of this block (4 bytes)
|
2017-04-27 04:20:05 +08:00
|
|
|
// 0xA030 -- entries (2 bytes each)
|
|
|
|
// 0xA500
|
|
|
|
// 0xA700
|
|
|
|
// 0xAA00
|
2017-04-25 11:31:10 +08:00
|
|
|
// 0x20000 -- page address (4 bytes)
|
|
|
|
// 12 -- size of this block (4 bytes)
|
2017-04-27 04:20:05 +08:00
|
|
|
// 0xA004 -- entries (2 bytes each)
|
|
|
|
// 0xA008
|
2017-04-25 11:31:10 +08:00
|
|
|
//
|
2017-04-27 04:20:05 +08:00
|
|
|
// Usually we have a lot of relocations for each page, so the number of
|
2017-04-27 03:50:49 +08:00
|
|
|
// bytes for one .reloc entry is close to 2 bytes on average.
|
2015-07-25 09:44:32 +08:00
|
|
|
BaserelChunk::BaserelChunk(uint32_t page, Baserel *begin, Baserel *end) {
|
2015-06-15 09:23:58 +08:00
|
|
|
// Block header consists of 4 byte page RVA and 4 byte block size.
|
|
|
|
// Each entry is 2 byte. Last entry may be padding.
|
2016-01-15 04:53:50 +08:00
|
|
|
data.resize(alignTo((end - begin) * 2 + 8, 4));
|
2015-06-15 09:23:58 +08:00
|
|
|
uint8_t *p = data.data();
|
|
|
|
write32le(p, page);
|
|
|
|
write32le(p + 4, data.size());
|
|
|
|
p += 8;
|
2015-07-25 09:44:32 +08:00
|
|
|
for (Baserel *i = begin; i != end; ++i) {
|
|
|
|
write16le(p, (i->type << 12) | (i->rva - page));
|
2015-06-15 09:23:58 +08:00
|
|
|
p += 2;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-09-20 07:28:57 +08:00
|
|
|
void BaserelChunk::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
memcpy(buf, data.data(), data.size());
|
2015-06-15 09:23:58 +08:00
|
|
|
}
|
|
|
|
|
2015-07-25 09:44:32 +08:00
|
|
|
uint8_t Baserel::getDefaultType() {
|
2015-07-26 05:54:50 +08:00
|
|
|
switch (config->machine) {
|
|
|
|
case AMD64:
|
2017-11-06 15:02:33 +08:00
|
|
|
case ARM64:
|
2015-07-25 09:44:32 +08:00
|
|
|
return IMAGE_REL_BASED_DIR64;
|
2015-07-26 05:54:50 +08:00
|
|
|
case I386:
|
2017-07-26 04:00:37 +08:00
|
|
|
case ARMNT:
|
2015-07-25 09:44:32 +08:00
|
|
|
return IMAGE_REL_BASED_HIGHLOW;
|
|
|
|
default:
|
|
|
|
llvm_unreachable("unknown machine type");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-05-23 04:21:52 +08:00
|
|
|
MergeChunk *MergeChunk::instances[Log2MaxSectionAlignment + 1] = {};
|
2018-03-16 05:14:02 +08:00
|
|
|
|
|
|
|
MergeChunk::MergeChunk(uint32_t alignment)
|
2019-05-25 04:25:40 +08:00
|
|
|
: builder(StringTableBuilder::RAW, alignment) {
|
2019-05-23 04:21:52 +08:00
|
|
|
setAlignment(alignment);
|
2018-03-16 05:14:02 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void MergeChunk::addSection(SectionChunk *c) {
|
2019-05-23 04:21:52 +08:00
|
|
|
assert(isPowerOf2_32(c->getAlignment()));
|
|
|
|
uint8_t p2Align = llvm::Log2_32(c->getAlignment());
|
2019-05-28 23:32:11 +08:00
|
|
|
assert(p2Align < array_lengthof(instances));
|
2019-05-23 04:21:52 +08:00
|
|
|
auto *&mc = instances[p2Align];
|
2018-03-16 05:14:02 +08:00
|
|
|
if (!mc)
|
2019-05-23 04:21:52 +08:00
|
|
|
mc = make<MergeChunk>(c->getAlignment());
|
2018-03-16 05:14:02 +08:00
|
|
|
mc->sections.push_back(c);
|
|
|
|
}
|
|
|
|
|
|
|
|
void MergeChunk::finalizeContents() {
|
2019-05-24 08:02:00 +08:00
|
|
|
assert(!finalized && "should only finalize once");
|
|
|
|
for (SectionChunk *c : sections)
|
|
|
|
if (c->live)
|
|
|
|
builder.add(toStringRef(c->getContents()));
|
|
|
|
builder.finalize();
|
|
|
|
finalized = true;
|
|
|
|
}
|
2018-03-16 05:14:02 +08:00
|
|
|
|
2019-05-24 08:02:00 +08:00
|
|
|
void MergeChunk::assignSubsectionRVAs() {
|
2018-03-16 05:14:02 +08:00
|
|
|
for (SectionChunk *c : sections) {
|
2018-08-31 15:45:20 +08:00
|
|
|
if (!c->live)
|
2018-03-16 05:14:02 +08:00
|
|
|
continue;
|
|
|
|
size_t off = builder.getOffset(toStringRef(c->getContents()));
|
|
|
|
c->setRVA(rva + off);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-20 04:03:24 +08:00
|
|
|
uint32_t MergeChunk::getOutputCharacteristics() const {
|
2018-03-16 05:14:02 +08:00
|
|
|
return IMAGE_SCN_MEM_READ | IMAGE_SCN_CNT_INITIALIZED_DATA;
|
|
|
|
}
|
|
|
|
|
|
|
|
size_t MergeChunk::getSize() const {
|
|
|
|
return builder.getSize();
|
|
|
|
}
|
|
|
|
|
|
|
|
void MergeChunk::writeTo(uint8_t *buf) const {
|
2019-05-10 05:21:22 +08:00
|
|
|
builder.write(buf);
|
2018-03-16 05:14:02 +08:00
|
|
|
}
|
|
|
|
|
[COFF] Provide __CTOR_LIST__ and __DTOR_LIST__ symbols for MinGW
MinGW uses these kind of list terminator symbols for traversing
the constructor/destructor lists. These list terminators are
actual pointers entries in the lists, with the values 0 and
(uintptr_t)-1 (instead of just symbols pointing to the start/end
of the list).
(This mechanism exists in both the mingw-w64 crt startup code and
in libgcc; normally the mingw-w64 one is used, but a DLL build of
libgcc uses the libgcc one. Therefore it's not trivial to change
the mechanism without lots of cross-project synchronization and
potentially invalidating some combinations of old/new versions
of them.)
When mingw-w64 has been used with lld so far, the CRT startup object
files have so far provided these symbols, ending up with different,
incompatible builds of the CRT startup object files depending on
whether binutils or lld are going to be used.
In order to avoid the need of different configuration of the CRT startup
object files depending on what linker to be used, provide these symbols
in lld instead. (Mingw-w64 checks at build time whether the linker
provides these symbols or not.) This unifies this particular detail
between the two linkers.
This does disallow the use of the very latest lld with older versions
of mingw-w64 (the configure check for the list was added recently;
earlier it simply checked whether the CRT was built with gcc or clang),
and requires rebuilding the mingw-w64 CRT. But the number of users of
lld+mingw still is low enough that such a change should be tolerable,
and unifies this aspect of the toolchains, easing interoperability
between the toolchains for the future.
The actual test for this feature is added in ctors_dtors_priority.s,
but a number of other tests that checked absolute output addresses
are updated.
Differential Revision: https://reviews.llvm.org/D52053
llvm-svn: 342294
2018-09-15 06:26:59 +08:00
|
|
|
// MinGW specific.
|
2018-10-12 01:45:58 +08:00
|
|
|
size_t AbsolutePointerChunk::getSize() const { return config->wordsize; }
|
[COFF] Provide __CTOR_LIST__ and __DTOR_LIST__ symbols for MinGW
MinGW uses these kind of list terminator symbols for traversing
the constructor/destructor lists. These list terminators are
actual pointers entries in the lists, with the values 0 and
(uintptr_t)-1 (instead of just symbols pointing to the start/end
of the list).
(This mechanism exists in both the mingw-w64 crt startup code and
in libgcc; normally the mingw-w64 one is used, but a DLL build of
libgcc uses the libgcc one. Therefore it's not trivial to change
the mechanism without lots of cross-project synchronization and
potentially invalidating some combinations of old/new versions
of them.)
When mingw-w64 has been used with lld so far, the CRT startup object
files have so far provided these symbols, ending up with different,
incompatible builds of the CRT startup object files depending on
whether binutils or lld are going to be used.
In order to avoid the need of different configuration of the CRT startup
object files depending on what linker to be used, provide these symbols
in lld instead. (Mingw-w64 checks at build time whether the linker
provides these symbols or not.) This unifies this particular detail
between the two linkers.
This does disallow the use of the very latest lld with older versions
of mingw-w64 (the configure check for the list was added recently;
earlier it simply checked whether the CRT was built with gcc or clang),
and requires rebuilding the mingw-w64 CRT. But the number of users of
lld+mingw still is low enough that such a change should be tolerable,
and unifies this aspect of the toolchains, easing interoperability
between the toolchains for the future.
The actual test for this feature is added in ctors_dtors_priority.s,
but a number of other tests that checked absolute output addresses
are updated.
Differential Revision: https://reviews.llvm.org/D52053
llvm-svn: 342294
2018-09-15 06:26:59 +08:00
|
|
|
|
|
|
|
void AbsolutePointerChunk::writeTo(uint8_t *buf) const {
|
|
|
|
if (config->is64()) {
|
2019-05-10 05:21:22 +08:00
|
|
|
write64le(buf, value);
|
[COFF] Provide __CTOR_LIST__ and __DTOR_LIST__ symbols for MinGW
MinGW uses these kind of list terminator symbols for traversing
the constructor/destructor lists. These list terminators are
actual pointers entries in the lists, with the values 0 and
(uintptr_t)-1 (instead of just symbols pointing to the start/end
of the list).
(This mechanism exists in both the mingw-w64 crt startup code and
in libgcc; normally the mingw-w64 one is used, but a DLL build of
libgcc uses the libgcc one. Therefore it's not trivial to change
the mechanism without lots of cross-project synchronization and
potentially invalidating some combinations of old/new versions
of them.)
When mingw-w64 has been used with lld so far, the CRT startup object
files have so far provided these symbols, ending up with different,
incompatible builds of the CRT startup object files depending on
whether binutils or lld are going to be used.
In order to avoid the need of different configuration of the CRT startup
object files depending on what linker to be used, provide these symbols
in lld instead. (Mingw-w64 checks at build time whether the linker
provides these symbols or not.) This unifies this particular detail
between the two linkers.
This does disallow the use of the very latest lld with older versions
of mingw-w64 (the configure check for the list was added recently;
earlier it simply checked whether the CRT was built with gcc or clang),
and requires rebuilding the mingw-w64 CRT. But the number of users of
lld+mingw still is low enough that such a change should be tolerable,
and unifies this aspect of the toolchains, easing interoperability
between the toolchains for the future.
The actual test for this feature is added in ctors_dtors_priority.s,
but a number of other tests that checked absolute output addresses
are updated.
Differential Revision: https://reviews.llvm.org/D52053
llvm-svn: 342294
2018-09-15 06:26:59 +08:00
|
|
|
} else {
|
2019-05-10 05:21:22 +08:00
|
|
|
write32le(buf, value);
|
[COFF] Provide __CTOR_LIST__ and __DTOR_LIST__ symbols for MinGW
MinGW uses these kind of list terminator symbols for traversing
the constructor/destructor lists. These list terminators are
actual pointers entries in the lists, with the values 0 and
(uintptr_t)-1 (instead of just symbols pointing to the start/end
of the list).
(This mechanism exists in both the mingw-w64 crt startup code and
in libgcc; normally the mingw-w64 one is used, but a DLL build of
libgcc uses the libgcc one. Therefore it's not trivial to change
the mechanism without lots of cross-project synchronization and
potentially invalidating some combinations of old/new versions
of them.)
When mingw-w64 has been used with lld so far, the CRT startup object
files have so far provided these symbols, ending up with different,
incompatible builds of the CRT startup object files depending on
whether binutils or lld are going to be used.
In order to avoid the need of different configuration of the CRT startup
object files depending on what linker to be used, provide these symbols
in lld instead. (Mingw-w64 checks at build time whether the linker
provides these symbols or not.) This unifies this particular detail
between the two linkers.
This does disallow the use of the very latest lld with older versions
of mingw-w64 (the configure check for the list was added recently;
earlier it simply checked whether the CRT was built with gcc or clang),
and requires rebuilding the mingw-w64 CRT. But the number of users of
lld+mingw still is low enough that such a change should be tolerable,
and unifies this aspect of the toolchains, easing interoperability
between the toolchains for the future.
The actual test for this feature is added in ctors_dtors_priority.s,
but a number of other tests that checked absolute output addresses
are updated.
Differential Revision: https://reviews.llvm.org/D52053
llvm-svn: 342294
2018-09-15 06:26:59 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-05-29 03:09:30 +08:00
|
|
|
} // namespace coff
|
|
|
|
} // namespace lld
|