2014-06-18 16:37:28 +08:00
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// REQUIRES: aarch64-registered-target
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2014-03-29 23:09:45 +08:00
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu \
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2017-05-29 13:38:20 +08:00
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// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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2014-03-29 23:09:45 +08:00
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int crc32b(int a, char b)
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{
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return __builtin_arm_crc32b(a,b);
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// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
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2014-03-29 23:09:45 +08:00
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}
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int crc32cb(int a, char b)
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{
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return __builtin_arm_crc32cb(a,b);
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// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
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2014-03-29 23:09:45 +08:00
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}
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int crc32h(int a, short b)
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{
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return __builtin_arm_crc32h(a,b);
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// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
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2014-03-29 23:09:45 +08:00
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}
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int crc32ch(int a, short b)
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{
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return __builtin_arm_crc32ch(a,b);
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// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
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2014-03-29 23:09:45 +08:00
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}
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int crc32w(int a, int b)
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{
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return __builtin_arm_crc32w(a,b);
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
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2014-03-29 23:09:45 +08:00
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}
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int crc32cw(int a, int b)
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{
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return __builtin_arm_crc32cw(a,b);
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
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2014-03-29 23:09:45 +08:00
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}
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int crc32d(int a, long b)
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{
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return __builtin_arm_crc32d(a,b);
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
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2014-03-29 23:09:45 +08:00
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}
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int crc32cd(int a, long b)
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{
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return __builtin_arm_crc32cd(a,b);
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2014-05-24 20:52:07 +08:00
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// CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)
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2014-03-29 23:09:45 +08:00
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}
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