forked from OSchip/llvm-project
307 lines
9.4 KiB
Plaintext
307 lines
9.4 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define void @eq() {entry: ret void}
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define void @ne() {entry: ret void}
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define void @sgt() {entry: ret void}
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define void @sge() {entry: ret void}
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define void @slt() {entry: ret void}
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define void @sle() {entry: ret void}
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define void @ugt() {entry: ret void}
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define void @uge() {entry: ret void}
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define void @ult() {entry: ret void}
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define void @ule() {entry: ret void}
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...
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---
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name: eq
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: eq
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(eq), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ne
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ne
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(ne), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sgt
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sgt
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(sgt), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(sgt), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sge
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sge
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(sge), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(sge), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: slt
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: slt
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(slt), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(slt), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sle
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sle
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(sle), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(sle), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ugt
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ugt
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(ugt), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: uge
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: uge
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(uge), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(uge), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ult
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ult
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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%0:_(s32) = COPY $a0
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%1:_(s32) = COPY $a1
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%4:_(s32) = G_ICMP intpred(ult), %0(s32), %1
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%5:_(s32) = G_CONSTANT i32 1
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%6:_(s32) = COPY %4(s32)
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%3:_(s32) = G_AND %6, %5
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ule
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alignment: 2
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ule
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
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; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ule), [[COPY]](s32), [[COPY1]]
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; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
|
||
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; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]
|
||
|
|
; MIPS32: $v0 = COPY [[AND]](s32)
|
||
|
|
; MIPS32: RetRA implicit $v0
|
||
|
|
%0:_(s32) = COPY $a0
|
||
|
|
%1:_(s32) = COPY $a1
|
||
|
|
%4:_(s32) = G_ICMP intpred(ule), %0(s32), %1
|
||
|
|
%5:_(s32) = G_CONSTANT i32 1
|
||
|
|
%6:_(s32) = COPY %4(s32)
|
||
|
|
%3:_(s32) = G_AND %6, %5
|
||
|
|
$v0 = COPY %3(s32)
|
||
|
|
RetRA implicit $v0
|
||
|
|
|
||
|
|
...
|