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llvm-project/lld/test/ELF/arm-thumb-branch.s

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[ELF] Move `// REQUIRES:` line to the top llvm-svn: 335676
2018-06-27 06:20:04 +08:00
// REQUIRES: arm
Add initial support for Thumb for ARMv7a Add support for the R_ARM_THM relocations used in the objects present in arm-linux-gnueabihf-gcc. These are: R_ARM_THM_CALL R_ARM_THM_JUMP11 R_ARM_THM_JUMP19 R_ARM_THM_JUMP24 R_ARM_THM_MOVT_ABS R_ARM_THM_MOVW_ABS_NC Interworking between ARM and Thumb is partially supported with BLX. The R_ARM_CALL relocation for ARM instructions and R_ARM_THM_CALL relocation for Thumb instructions will write out a BL or BLX depending on the state of the Target. Assumptions: - Availability of BLX and extended range of Thumb 4-byte Branch instructions. - In relocateOne if (Val & 0x1) == 1 target is Thumb, 0 is ARM. This will hold for objects that comply with the ABI for the ARM architecture. This is sufficient for hello world to work with a recent arm-linux-gnueabihf distribution. Limitations: No interworking for R_ARM_JUMP24, R_ARM_THM_JUMP24, R_ARM_THM_JUMP19 and the deprecated R_ARM_PLT32 and R_ARM_PC24 instructions as these cannot be written out as a BLX and need a state change thunk. No range extension thunks. The R_ARM_JUMP24 and R_ARM_THM_CALL have a range of 16Mb llvm-svn: 272881
2016-06-16 17:53:46 +08:00
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/far-arm-thumb-abs.s -o %tfar
// RUN: echo "SECTIONS { \
Make tests less dependent on the exact layout. In most cases that means just not checking the address when we don't need it. For some tests it is easier to just set . to a known value. llvm-svn: 281976
2016-09-20 23:08:24 +08:00
// RUN: . = 0xb4; \
Add initial support for Thumb for ARMv7a Add support for the R_ARM_THM relocations used in the objects present in arm-linux-gnueabihf-gcc. These are: R_ARM_THM_CALL R_ARM_THM_JUMP11 R_ARM_THM_JUMP19 R_ARM_THM_JUMP24 R_ARM_THM_MOVT_ABS R_ARM_THM_MOVW_ABS_NC Interworking between ARM and Thumb is partially supported with BLX. The R_ARM_CALL relocation for ARM instructions and R_ARM_THM_CALL relocation for Thumb instructions will write out a BL or BLX depending on the state of the Target. Assumptions: - Availability of BLX and extended range of Thumb 4-byte Branch instructions. - In relocateOne if (Val & 0x1) == 1 target is Thumb, 0 is ARM. This will hold for objects that comply with the ABI for the ARM architecture. This is sufficient for hello world to work with a recent arm-linux-gnueabihf distribution. Limitations: No interworking for R_ARM_JUMP24, R_ARM_THM_JUMP24, R_ARM_THM_JUMP19 and the deprecated R_ARM_PLT32 and R_ARM_PC24 instructions as these cannot be written out as a BLX and need a state change thunk. No range extension thunks. The R_ARM_JUMP24 and R_ARM_THM_CALL have a range of 16Mb llvm-svn: 272881
2016-06-16 17:53:46 +08:00
// RUN: .callee1 : { *(.callee_low) } \
// RUN: .caller : { *(.text) } \
// RUN: .callee2 : { *(.callee_high) } } " > %t.script
// RUN: ld.lld --script %t.script %t %tfar -o %t2 2>&1
// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
.syntax unified
.thumb
.section .callee_low, "ax",%progbits
.align 2
.type callee_low,%function
callee_low:
bx lr
.section .text, "ax",%progbits
.globl _start
.balign 0x10000
.type _start,%function
_start:
bl callee_low
b callee_low
beq callee_low
bl callee_high
b callee_high
bne callee_high
bl far_uncond
b far_uncond
bgt far_cond
bx lr
.section .callee_high, "ax",%progbits
.align 2
.type callee_high,%function
callee_high:
bx lr
// CHECK: Disassembly of section .callee1:
// CHECK-NEXT: callee_low:
// CHECK-NEXT: b4: 70 47 bx lr
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-NEXT: _start:
// CHECK-NEXT: 10000: f0 f7 58 f8 bl #-65360
// CHECK-NEXT: 10004: f0 f7 56 b8 b.w #-65364
// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w #-65368
// CHECK-NEXT: 1000c: 00 f0 0c f8 bl #24
// CHECK-NEXT: 10010: 00 f0 0a b8 b.w #20
// CHECK-NEXT: 10014: 40 f0 08 80 bne.w #16
// CHECK-NEXT: 10018: ff f3 ff d7 bl #16777214
// CHECK-NEXT: 1001c: ff f3 fd 97 b.w #16777210
// CHECK-NEXT: 10020: 3f f3 ff af bgt.w #1048574
// CHECK-NEXT: 10024: 70 47 bx lr
Add trap instructions for ARM and MIPS. This patch fills holes in executable sections with 0xd4 (ARM) or 0xef (MIPS). These trap instructions were suggested by Theo de Raadt. llvm-svn: 306322
2017-06-27 03:45:53 +08:00
// CHECK-NEXT: 10026:
Add initial support for Thumb for ARMv7a Add support for the R_ARM_THM relocations used in the objects present in arm-linux-gnueabihf-gcc. These are: R_ARM_THM_CALL R_ARM_THM_JUMP11 R_ARM_THM_JUMP19 R_ARM_THM_JUMP24 R_ARM_THM_MOVT_ABS R_ARM_THM_MOVW_ABS_NC Interworking between ARM and Thumb is partially supported with BLX. The R_ARM_CALL relocation for ARM instructions and R_ARM_THM_CALL relocation for Thumb instructions will write out a BL or BLX depending on the state of the Target. Assumptions: - Availability of BLX and extended range of Thumb 4-byte Branch instructions. - In relocateOne if (Val & 0x1) == 1 target is Thumb, 0 is ARM. This will hold for objects that comply with the ABI for the ARM architecture. This is sufficient for hello world to work with a recent arm-linux-gnueabihf distribution. Limitations: No interworking for R_ARM_JUMP24, R_ARM_THM_JUMP24, R_ARM_THM_JUMP19 and the deprecated R_ARM_PLT32 and R_ARM_PC24 instructions as these cannot be written out as a BLX and need a state change thunk. No range extension thunks. The R_ARM_JUMP24 and R_ARM_THM_CALL have a range of 16Mb llvm-svn: 272881
2016-06-16 17:53:46 +08:00
// CHECK-NEXT: Disassembly of section .callee2:
// CHECK-NEXT: callee_high:
// CHECK-NEXT: 10028: 70 47 bx lr