[AArch64] Fix issues with large arrays on stack
Summary:
This patch fixes a few issues when large arrays are allocated on the
stack. Currently, clang has inconsistent behaviour, for debug builds
there is an assertion failure when the array size on stack is around 2GB
but there is no assertion when the stack is around 8GB. For release
builds there is no assertion, the compilation succeeds but generates
incorrect code. The incorrect code generated is due to using
int/unsigned int instead of their 64-bit counterparts. This patch,
1) Removes the assertion in frame legality check.
2) Converts int/unsigned int in some places to the 64-bit variants. This
helps in generating correct code and removes the inconsistent behaviour.
3) Adds a test which runs without optimisations.
Reviewers: sdesmalen, efriedma, fhahn, aemerson
Reviewed By: efriedma
Subscribers: eli.friedman, fpetrogalli, kristof.beyls, hiraditya,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70496
2019-11-20 20:45:26 +08:00
|
|
|
; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
|
|
|
|
|
|
|
|
|
|
@.str = private unnamed_addr constant [11 x i8] c"val = %ld\0A\00", align 1
|
|
|
|
|
|
|
|
|
|
; Function Attrs: noinline optnone
|
|
|
|
|
define dso_local void @set_large(i64 %val) #0 {
|
|
|
|
|
entry:
|
|
|
|
|
%val.addr = alloca i64, align 8
|
|
|
|
|
%large = alloca [268435456 x i64], align 8
|
|
|
|
|
%i = alloca i32, align 4
|
|
|
|
|
store i64 %val, i64* %val.addr, align 8
|
|
|
|
|
%0 = load i64, i64* %val.addr, align 8
|
|
|
|
|
%arrayidx = getelementptr inbounds [268435456 x i64], [268435456 x i64]* %large, i64 0, i64 %0
|
|
|
|
|
store i64 1, i64* %arrayidx, align 8
|
|
|
|
|
%1 = load i64, i64* %val.addr, align 8
|
|
|
|
|
%arrayidx1 = getelementptr inbounds [268435456 x i64], [268435456 x i64]* %large, i64 0, i64 %1
|
|
|
|
|
%2 = load i64, i64* %arrayidx1, align 8
|
|
|
|
|
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 %2)
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
declare dso_local i32 @printf(i8*, ...)
|
|
|
|
|
|
2019-12-25 07:52:21 +08:00
|
|
|
attributes #0 = { noinline optnone "frame-pointer"="all" }
|
[AArch64] Fix issues with large arrays on stack
Summary:
This patch fixes a few issues when large arrays are allocated on the
stack. Currently, clang has inconsistent behaviour, for debug builds
there is an assertion failure when the array size on stack is around 2GB
but there is no assertion when the stack is around 8GB. For release
builds there is no assertion, the compilation succeeds but generates
incorrect code. The incorrect code generated is due to using
int/unsigned int instead of their 64-bit counterparts. This patch,
1) Removes the assertion in frame legality check.
2) Converts int/unsigned int in some places to the 64-bit variants. This
helps in generating correct code and removes the inconsistent behaviour.
3) Adds a test which runs without optimisations.
Reviewers: sdesmalen, efriedma, fhahn, aemerson
Reviewed By: efriedma
Subscribers: eli.friedman, fpetrogalli, kristof.beyls, hiraditya,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70496
2019-11-20 20:45:26 +08:00
|
|
|
|
|
|
|
|
; CHECK: stp x[[SPILL_REG1:[0-9]+]], x[[SPILL_REG2:[0-9]+]], [sp, #-[[SPILL_OFFSET1:[0-9]+]]]
|
|
|
|
|
; CHECK-NEXT: str x[[SPILL_REG3:[0-9]+]], [sp, #[[SPILL_OFFSET2:[0-9]+]]]
|
|
|
|
|
; CHECK-NEXT: mov x[[FRAME:[0-9]+]], sp
|
|
|
|
|
; CHECK-COUNT-128: sub sp, sp, #[[STACK1:[0-9]+]], lsl #12
|
|
|
|
|
; CHECK-NEXT: sub sp, sp, #[[STACK2:[0-9]+]], lsl #12
|
|
|
|
|
; CHECK-NEXT: sub sp, sp, #[[STACK3:[0-9]+]]
|
|
|
|
|
; CHECK: sub x[[INDEX:[0-9]+]], x[[FRAME]], #8
|
|
|
|
|
; CHECK-NEXT: str x0, [x[[INDEX]]]
|
|
|
|
|
; CHECK-NEXT: ldr x[[VAL1:[0-9]+]], [x[[INDEX]]]
|
|
|
|
|
; CHECK-NEXT: mov x[[VAL2:[0-9]+]], #8
|
|
|
|
|
; CHECK-NEXT: add x[[VAL3:[0-9]+]], sp, #8
|
|
|
|
|
; CHECK-NEXT: madd x[[VAL1]], x[[VAL1]], x[[VAL2]], x[[VAL3]]
|
|
|
|
|
; CHECK-NEXT: mov x[[TMP1:[0-9]+]], #1
|
|
|
|
|
; CHECK-NEXT: str x[[TMP1]], [x[[VAL1]]]
|
|
|
|
|
; CHECK-NEXT: ldr x[[INDEX]], [x[[INDEX]]]
|
|
|
|
|
; CHECK-NEXT: mov x[[VAL4:[0-9]+]], #8
|
|
|
|
|
; CHECK-NEXT: madd x[[INDEX]], x[[INDEX]], x[[VAL4]], x[[VAL3]]
|
|
|
|
|
; CHECK-NEXT: ldr x1, [x[[INDEX]]
|
|
|
|
|
; CHECK: bl printf
|
|
|
|
|
; CHECK-COUNT-128: add sp, sp, #[[STACK1]], lsl #12
|
|
|
|
|
; CHECK-NEXT: add sp, sp, #[[STACK2]], lsl #12
|
|
|
|
|
; CHECK-NEXT: add sp, sp, #[[STACK3]]
|
|
|
|
|
; CHECK-NEXT: ldr x[[SPILL_REG3]], [sp, #[[SPILL_OFFSET2]]]
|
|
|
|
|
; CHECK-NEXT: ldp x[[SPILL_REG1]], x[[SPILL_REG2]], [sp], #[[SPILL_OFFSET1]]
|
