forked from OSchip/llvm-project
23 lines
650 B
LLVM
23 lines
650 B
LLVM
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; RUN: llc -mcpu=a2 -enable-misched -enable-aa-sched-mi < %s | FileCheck %s
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define i8 @test1(i8* noalias %a, i8* noalias %b, i8* noalias %c) nounwind {
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entry:
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%q = load i8* %b
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call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 1)
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%r = load i8* %c
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%s = add i8 %q, %r
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ret i8 %s
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}
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declare void @llvm.prefetch(i8*, i32, i32, i32)
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; Test that we've moved the second load to before the dcbt to better
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; hide its latency.
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; CHECK: @test1
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; CHECK: lbz
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; CHECK: lbz
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; CHECK: dcbt
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