2017-08-09 05:51:26 +08:00
|
|
|
# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner %s -o - | FileCheck %s
|
|
|
|
--- |
|
2017-09-28 04:47:39 +08:00
|
|
|
|
2018-01-11 02:49:57 +08:00
|
|
|
@x = common global i32 0, align 4
|
|
|
|
|
2017-12-19 03:33:21 +08:00
|
|
|
define void @baz() #0 {
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2017-08-09 05:51:26 +08:00
|
|
|
define i32 @main() #0 {
|
|
|
|
ret i32 0
|
|
|
|
}
|
|
|
|
|
2017-09-28 04:47:39 +08:00
|
|
|
define void @bar(i32 %a) #0 {
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
attributes #0 = { noinline noredzone "no-frame-pointer-elim"="true" }
|
2017-08-09 05:51:26 +08:00
|
|
|
...
|
|
|
|
---
|
|
|
|
# This test ensures that we
|
|
|
|
# - Create outlined functions
|
|
|
|
# - Don't outline anything to do with LR or W30
|
2017-09-28 04:47:39 +08:00
|
|
|
# - Save LR when it's not available
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
# - Don't outline stack instructions when we might need to save + restore
|
2017-08-09 05:51:26 +08:00
|
|
|
#
|
|
|
|
# CHECK-LABEL: name: main
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK: BL @OUTLINED_FUNCTION_[[F0:[0-9]+]]
|
|
|
|
# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
|
|
|
|
# CHECK-NEXT: %lr = ORRXri %xzr, 1
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK: BL @OUTLINED_FUNCTION_[[F0]]
|
|
|
|
# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
|
|
|
|
# CHECK-NEXT: %lr = ORRXri %xzr, 1
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK: BL @OUTLINED_FUNCTION_[[F0]]
|
|
|
|
# CHECK-NEXT: early-clobber %sp, %lr = LDRXpost %sp, 16
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
# CHECK-NEXT: %x16 = ADDXri %sp, 48, 0
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK-NEXT: STRHHroW %w16, %x9, %w30, 1, 1
|
|
|
|
# CHECK-NEXT: %lr = ORRXri %xzr, 1
|
2017-08-09 05:51:26 +08:00
|
|
|
name: main
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
tracksRegLiveness: true
|
2017-08-09 05:51:26 +08:00
|
|
|
body: |
|
2017-09-28 04:47:39 +08:00
|
|
|
bb.0:
|
2017-08-09 05:51:26 +08:00
|
|
|
%sp = frame-setup SUBXri %sp, 16, 0
|
|
|
|
%x9 = ORRXri %xzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w30 = ORRWri %wzr, 1
|
|
|
|
%lr = ORRXri %xzr, 1
|
|
|
|
|
2017-12-08 05:51:43 +08:00
|
|
|
%x20, %x19 = LDPXi %sp, 10
|
2017-08-09 05:51:26 +08:00
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
2018-01-11 02:49:57 +08:00
|
|
|
renamable %x9 = ADRP target-flags(aarch64-page) @x
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
%x16 = ADDXri %sp, 48, 0;
|
2017-08-09 05:51:26 +08:00
|
|
|
STRHHroW %w16, %x9, %w30, 1, 1
|
|
|
|
%lr = ORRXri %xzr, 1
|
|
|
|
%w3 = ORRWri %wzr, 1993
|
|
|
|
|
2017-12-08 05:51:43 +08:00
|
|
|
%x20, %x19 = LDPXi %sp, 10
|
2017-08-09 05:51:26 +08:00
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
2018-01-11 02:49:57 +08:00
|
|
|
renamable %x9 = ADRP target-flags(aarch64-page) @x
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
%x16 = ADDXri %sp, 48, 0;
|
2017-08-09 05:51:26 +08:00
|
|
|
STRHHroW %w16, %x9, %w30, 1, 1
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
%lr = ORRXri %xzr, 1
|
2017-08-09 05:51:26 +08:00
|
|
|
|
|
|
|
%w4 = ORRWri %wzr, 1994
|
|
|
|
|
2017-12-08 05:51:43 +08:00
|
|
|
%x20, %x19 = LDPXi %sp, 10
|
2017-08-09 05:51:26 +08:00
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
|
|
|
%w16 = ORRWri %wzr, 1
|
2018-01-11 02:49:57 +08:00
|
|
|
renamable %x9 = ADRP target-flags(aarch64-page) @x
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
%x16 = ADDXri %sp, 48, 0;
|
2017-08-09 05:51:26 +08:00
|
|
|
STRHHroW %w16, %x9, %w30, 1, 1
|
|
|
|
%lr = ORRXri %xzr, 1
|
|
|
|
|
|
|
|
%sp = ADDXri %sp, 16, 0
|
|
|
|
RET undef %lr
|
2017-09-28 04:47:39 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# This test ensures that we can avoid saving LR when it's available.
|
|
|
|
# CHECK-LABEL: bb.1:
|
2017-12-19 03:33:21 +08:00
|
|
|
# CHECK-NOT: BL @baz, implicit-def dead %lr, implicit %sp
|
2017-09-28 04:47:39 +08:00
|
|
|
# CHECK: BL @OUTLINED_FUNCTION_[[F1:[0-9]+]], implicit-def %lr, implicit %sp
|
|
|
|
# CHECK-NEXT: %w17 = ORRWri %wzr, 2
|
|
|
|
# CHECK-NEXT: BL @OUTLINED_FUNCTION_[[F1]], implicit-def %lr, implicit %sp
|
|
|
|
# CHECK-NEXT: %w8 = ORRWri %wzr, 0
|
|
|
|
name: bar
|
|
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
|
|
bb.0:
|
|
|
|
liveins: %w0, %lr, %w8
|
|
|
|
%sp = frame-setup SUBXri %sp, 32, 0
|
|
|
|
%fp = frame-setup ADDXri %sp, 16, 0
|
|
|
|
|
|
|
|
bb.1:
|
2017-12-19 03:33:21 +08:00
|
|
|
BL @baz, implicit-def dead %lr, implicit %sp
|
2017-09-28 04:47:39 +08:00
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
2017-12-19 03:33:21 +08:00
|
|
|
BL @baz, implicit-def dead %lr, implicit %sp
|
2017-09-28 04:47:39 +08:00
|
|
|
%w17 = ORRWri %wzr, 2
|
2017-12-19 03:33:21 +08:00
|
|
|
BL @baz, implicit-def dead %lr, implicit %sp
|
2017-09-28 04:47:39 +08:00
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
|
|
|
%w17 = ORRWri %wzr, 1
|
2017-12-19 03:33:21 +08:00
|
|
|
BL @baz, implicit-def dead %lr, implicit %sp
|
2017-09-28 04:47:39 +08:00
|
|
|
%w8 = ORRWri %wzr, 0
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
|
|
|
|
2017-09-28 04:47:39 +08:00
|
|
|
bb.2:
|
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
llvm-svn: 322048
2018-01-09 08:26:18 +08:00
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%x15 = ADDXri %sp, 48, 0;
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%w9 = ORRWri %wzr, 0
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%w15 = ORRWri %wzr, 1
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%x15 = ADDXri %sp, 48, 0;
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%w8 = ORRWri %wzr, 0
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bb.3:
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2017-09-28 04:47:39 +08:00
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%fp, %lr = LDPXi %sp, 2
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%sp = ADDXri %sp, 32, 0
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RET undef %lr
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...
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2017-12-19 03:33:21 +08:00
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---
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name: baz
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: %w0, %lr, %w8
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RET undef %lr
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2017-09-28 04:47:39 +08:00
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# CHECK-LABEL: name: OUTLINED_FUNCTION_{{[0-9]}}
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# CHECK=LABEL: name: OUTLINED_FUNCTION_{{[1-9]}}
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