forked from OSchip/llvm-project
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
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; RUN: llvm-as < %s > %t1
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; RUN: not llc -march=x86 -mcpu=i686 -mattr=-sse < %t1 2> %t2
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; RUN: grep "SSE register return with SSE disabled" %t2
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; RUN: llc -march=x86 -mcpu=i686 -mattr=+sse < %t1 | grep xmm
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i386-unknown-linux-gnu"
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@f = external global float ; <float*> [#uses=4]
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@d = external global double ; <double*> [#uses=4]
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define void @test() nounwind {
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entry:
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%0 = load float* @f, align 4 ; <float> [#uses=1]
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%1 = tail call inreg float @foo1(float inreg %0) nounwind ; <float> [#uses=1]
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store float %1, float* @f, align 4
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%2 = load double* @d, align 8 ; <double> [#uses=1]
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%3 = tail call inreg double @foo2(double inreg %2) nounwind ; <double> [#uses=1]
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store double %3, double* @d, align 8
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%4 = load float* @f, align 4 ; <float> [#uses=1]
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%5 = tail call inreg float @foo3(float inreg %4) nounwind ; <float> [#uses=1]
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store float %5, float* @f, align 4
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%6 = load double* @d, align 8 ; <double> [#uses=1]
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%7 = tail call inreg double @foo4(double inreg %6) nounwind ; <double> [#uses=1]
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store double %7, double* @d, align 8
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ret void
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}
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declare inreg float @foo1(float inreg)
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declare inreg double @foo2(double inreg)
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declare inreg float @foo3(float inreg)
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declare inreg double @foo4(double inreg)
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