2019-08-06 08:24:00 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s | FileCheck %s
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define signext i32 @mulw(i32 signext %s, i32 signext %n, i32 signext %k) nounwind {
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; CHECK-LABEL: mulw:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi a2, zero, 1
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2020-08-13 18:45:14 +08:00
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; CHECK-NEXT: bge a0, a1, .LBB0_2
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; CHECK-NEXT: .LBB0_1: # %for.body
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2019-08-06 08:24:00 +08:00
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mulw a2, a0, a2
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; CHECK-NEXT: addiw a0, a0, 1
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2020-08-13 18:45:14 +08:00
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; CHECK-NEXT: blt a0, a1, .LBB0_1
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; CHECK-NEXT: .LBB0_2: # %for.cond.cleanup
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2019-08-06 08:24:00 +08:00
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; CHECK-NEXT: mv a0, a2
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; CHECK-NEXT: ret
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entry:
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%cmp6 = icmp slt i32 %s, %n
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br i1 %cmp6, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ 1, %entry ], [ %mul, %for.body ]
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ret i32 %sum.0.lcssa
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for.body: ; preds = %entry, %for.body
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%i.08 = phi i32 [ %inc, %for.body ], [ %s, %entry ]
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%sum.07 = phi i32 [ %mul, %for.body ], [ 1, %entry ]
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%mul = mul nsw i32 %i.08, %sum.07
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%inc = add nsw i32 %i.08, 1
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%cmp = icmp slt i32 %inc, %n
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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}
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