2020-08-13 18:45:14 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-11-20 23:59:18 +08:00
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; RUN: llc < %s -march=mips -mcpu=mips32r6 -force-mips-long-branch | FileCheck %s
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; Check that when MIPS32R6 with the static relocation model with the usage of
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; long branches, that there is a nop between any compact branch and the static
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; relocation method of expanding branches. Previously, it could result in 'j'
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; following a b(ne|eq)zc, which would raise a reserved instruction exception.
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declare i32 @f(i32)
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declare i32 @g()
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2020-08-13 20:37:07 +08:00
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define i32 @test1(i32 %a) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: bnezc $4, $BB0_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB0_3
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; CHECK-NEXT: $BB0_2: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB0_3: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp eq i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test2(i32 %a) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: bgezc $4, $BB1_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB1_3
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; CHECK-NEXT: $BB1_2: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB1_3: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp sge i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test3(i32 %a) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: blezc $4, $BB2_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB2_3
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; CHECK-NEXT: $BB2_2: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB2_3: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp sle i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test4(i32 %a) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: bgtzc $4, $BB3_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB3_3
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; CHECK-NEXT: $BB3_2: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB3_3: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp sgt i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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2020-08-13 20:37:07 +08:00
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define i32 @test5(i32 %a) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: bgezc $4, $BB4_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB4_3
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; CHECK-NEXT: $BB4_2: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB4_3: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp slt i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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2020-08-13 20:37:07 +08:00
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define i32 @test6(i32 %a, i32 %b) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: sltu $1, $5, $4
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; CHECK-NEXT: bnezc $1, $BB5_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB5_3
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; CHECK-NEXT: $BB5_2: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB5_3: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp ugt i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test7(i32 %a, i32 %b) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test7:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: sltu $1, $4, $5
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; CHECK-NEXT: bnezc $1, $BB6_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB6_3
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; CHECK-NEXT: $BB6_2: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB6_3: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp uge i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test8(i32 %a, i32 %b) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: sltu $1, $4, $5
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; CHECK-NEXT: bnezc $1, $BB7_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB7_3
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; CHECK-NEXT: $BB7_2: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB7_3: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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2017-11-20 23:59:18 +08:00
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entry:
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%0 = icmp ult i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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define i32 @test9(i32 %a, i32 %b) {
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2020-08-13 18:45:14 +08:00
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; CHECK-LABEL: test9:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addiu $sp, $sp, -24
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 31, -4
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; CHECK-NEXT: sltu $1, $5, $4
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; CHECK-NEXT: bnezc $1, $BB8_2
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: bc $BB8_3
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; CHECK-NEXT: $BB8_2: # %cond.false
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; CHECK-NEXT: jal g
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, 24
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; CHECK-NEXT: $BB8_3: # %cond.true
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; CHECK-NEXT: jal f
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; CHECK-NEXT: nop
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; CHECK-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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|
|
; CHECK-NEXT: jr $ra
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|
|
; CHECK-NEXT: addiu $sp, $sp, 24
|
2017-11-20 23:59:18 +08:00
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|
entry:
|
|
|
|
%0 = icmp ule i32 %a, %b
|
|
|
|
br i1 %0, label %cond.true, label %cond.false
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|
|
cond.true:
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|
|
%1 = call i32 @f(i32 %a)
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|
|
|
ret i32 %1
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|
|
cond.false:
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|
|
%2 = call i32 @g()
|
|
|
|
ret i32 %2
|
|
|
|
}
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